[PATCH v4 3/6] dt-bindings: MIPS: Document Ingenic SoCs binding.
From: 周琰杰 (Zhou Yanjie) <hidden>
Date: 2020-02-14 18:03:41
Also in:
linux-clk, linux-mips, lkml
Subsystem:
mips, open firmware and flattened device tree bindings, the rest · Maintainers:
Thomas Bogendoerfer, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Document the available properties for the SoC root node and the
CPU nodes of the devicetree for the Ingenic XBurst SoCs.
Tested-by: H. Nikolaus Schaller <redacted>
Tested-by: Paul Boddie <redacted>
Signed-off-by: 周琰杰 (Zhou Yanjie) <redacted>
---
Notes:
v1->v2:
Change the two Document from txt to yaml.
v2->v3:
Fix formatting errors.
v3->v4:
Fix bugs in the two yaml files.
.../bindings/mips/ingenic/ingenic,cpu.yaml | 53 ++++++++++++++++++++++
.../bindings/mips/ingenic/ingenic,soc.yaml | 35 ++++++++++++++
2 files changed, 88 insertions(+)
create mode 100755 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
create mode 100755 Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml
diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
new file mode 100644
index 00000000..cb600ae
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml@@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for Ingenic XBurst family CPUs + +maintainers: + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> +description: | + Ingenic XBurst family CPUs shall have the following properties. + +properties: + compatible: + oneOf: + - const: ingenic,xburst + - const: ingenic,xburst2 + + reg: + description: | + The number of the CPU. + +required: + - device_type + - compatible + - reg + +examples: + - | + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "ingenic,xburst"; + reg = <0>; + + clocks = <&cgu JZ4780_CLK_CPU>; + clock-names = "cpu"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "ingenic,xburst"; + reg = <1>; + + clocks = <&cgu JZ4780_CLK_CORE1>; + clock-names = "cpu"; + }; + }; +...
diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml
new file mode 100644
index 00000000..11e5cde
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml@@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/ingenic/ingenic,soc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for Ingenic SoCs with XBurst CPU inside. + +maintainers: + - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> +description: | + Ingenic SoCs with XBurst CPU inside shall have the following properties. + +properties: + compatible: + oneOf: + - const: ingenic,jz4740 + - const: ingenic,jz4725b + - const: ingenic,jz4760 + - const: ingenic,jz4760b + - const: ingenic,jz4770 + - const: ingenic,jz4780 + - const: ingenic,x1000 + - const: ingenic,x1000e + - const: ingenic,x1500 + +required: + - compatible + +examples: + - | + #address-cells = <1>; + #size-cells = <1>; + compatible = "ingenic,jz4780"; +...
--
2.7.4