Hi Jagan,
small detail, this should come -after= 3/3 in the series, am I
wrong ?
On Mon, Dec 30, 2019 at 05:30:20PM +0530, Jagan Teki wrote:
From: Michael Trimarchi <michael@amarulasolutions.com>
Engicam i.CoreM6 1.5 Quad/Dual MIPI dtsi is reusing fec node
from Engicam i.CoreM6 dtsi but have sampe copy of phy-reset-gpio
and phy-mode properties.
So, drop this phy reset methods from imx6qdl-icore-1.5 dsti file.
Cc: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Anyway, I've tested on my iCore 1.5 Quad starter kit and things are
still working.
Pending acceptance of 3/3, which seem correct to me but I cannot
really judge knowing very few things about net:
Tested-by: Jacopo Mondi <jacopo@jmondi.org>
Thanks
j
quoted hunk ↗ jump to hunk
---
Changes for v2:
- new patch.
arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi b/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
index d91d46b5898f..0fd7f2e24d9c 100644
--- a/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi
@@ -25,10 +25,8 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET_REF>;
- phy-mode = "rmii";
status = "okay";
};
--2.18.0.321.gffc6fa0e3