Re: [PATCH 1/4] irqchip: sifive: Support hierarchy irq domain
From: Marc Zyngier <maz@kernel.org>
Date: 2019-11-12 12:43:00
Also in:
linux-gpio, linux-riscv, lkml
On 2019-11-12 13:21, Yash Shah wrote:
quoted hunk ↗ jump to hunk
Add support for hierarchy irq domains. This is needed as pre-requisite for gpio-sifive driver. Signed-off-by: Yash Shah <redacted> --- drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-sifive-plic.c | 41 +++++++++++++++++++++++++++++++++++---- 2 files changed, 38 insertions(+), 4 deletions(-)diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index ccbb897..a398552 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig@@ -488,6 +488,7 @@ endmenu config SIFIVE_PLIC bool "SiFive Platform-Level Interrupt Controller" depends on RISCV + select IRQ_DOMAIN_HIERARCHY help This enables support for the PLIC chip found in SiFive (and potentially other) RISC-V systems. The PLIC controls devicesdiff --git a/drivers/irqchip/irq-sifive-plic.cb/drivers/irqchip/irq-sifive-plic.c index 7d0a12f..2fa1c84 100644--- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c@@ -154,15 +154,48 @@ static struct irq_chip plic_chip = { static int plic_irqdomain_map(struct irq_domain *d, unsigned intirq, irq_hw_number_t hwirq) { - irq_set_chip_and_handler(irq, &plic_chip, handle_fasteoi_irq); - irq_set_chip_data(irq, NULL); + irq_domain_set_info(d, irq, hwirq, &plic_chip, d->host_data, + handle_fasteoi_irq, NULL, NULL); irq_set_noprobe(irq); return 0; } +static int plic_irq_domain_translate(struct irq_domain *d, + struct irq_fwspec *fwspec, + unsigned long *hwirq, unsigned int *type) +{ + if (WARN_ON(fwspec->param_count < 1)) + return -EINVAL; + *hwirq = fwspec->param[0]; + *type = IRQ_TYPE_NONE; + return 0; +}
This is actually what should be called irq_domain_translate_onecell(). Consider implementing that instead, and using it in this driver. I'm pretty sure other drivers could use it (I spotted irq-nvic.c).
+
+static int plic_irq_domain_alloc(struct irq_domain *domain, unsigned
int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ int i, ret;
+ irq_hw_number_t hwirq;
+ unsigned int type = IRQ_TYPE_NONE;
+ struct irq_fwspec *fwspec = arg;
+
+ ret = plic_irq_domain_translate(domain, fwspec, &hwirq, &type);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < nr_irqs; i++) {
+ ret = plic_irqdomain_map(domain, virq + i, hwirq + i);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct irq_domain_ops plic_irqdomain_ops = {
- .map = plic_irqdomain_map,
- .xlate = irq_domain_xlate_onecell,
+ .translate = plic_irq_domain_translate,
+ .alloc = plic_irq_domain_alloc,
+ .free = irq_domain_free_irqs_top,
};
static struct irq_domain *plic_irqdomain;
Otherwise, looks OK.
Thanks,
M.
--
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