Thread (16 messages) 16 messages, 4 authors, 2018-11-28

Re: [PATCH v5 1/5] dt-bindings: phy-qcom-qmp: Fix register underspecification

From: Stephen Boyd <hidden>
Date: 2018-11-04 02:40:22
Also in: lkml

Quoting Evan Green (2018-10-26 10:35:40)
quoted hunk ↗ jump to hunk
                        (or)
@@ -150,3 +153,54 @@ Example:
                ...
                ...
        };
+
+       phy@88eb000 {
+               compatible = "qcom,sdm845-qmp-usb3-uni-phy";
+               reg = <0x88eb000 0x18c>;
+               #clock-cells = <1>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
+                        <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+                        <&gcc GCC_USB3_SEC_CLKREF_CLK>,
+                        <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
+               clock-names = "aux", "cfg_ahb", "ref", "com_aux";
+
+               resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
+                        <&gcc GCC_USB3_PHY_SEC_BCR>;
+               reset-names = "phy", "common";
+
+               lane@88eb200 {
+                       reg = <0x88eb200 0x128>,
+                             <0x88eb400 0x1fc>,
+                             <0x88eb800 0x218>,
+                             <0x88eb600 0x70>;
+                       #phy-cells = <0>;
+                       clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+                       clock-names = "pipe0";
+                       clock-output-names = "usb3_uni_phy_pipe_clk_src";
If this has clock-output-names then I would expect to see a #clock-cells
property, but that isn't here in this node. Are we relying on the same
property in the parent node?
+               };
+       };
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