[PATCH 1/8] dt-bindings: mmc: Add DQS trim value to Tegra SDHCI
From: Aapo Vienamo <hidden>
Date: 2018-08-07 14:00:23
Also in:
linux-mmc, linux-tegra, lkml
Subsystem:
multimedia card (mmc), secure digital (sd) and sdio subsystem, open firmware and flattened device tree bindings, the rest · Maintainers:
Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Document HS400 DQS trim value device tree property. Signed-off-by: Aapo Vienamo <redacted> --- Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index 3c7960a..7d294f3 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt@@ -72,6 +72,7 @@ Optional properties for Tegra210 and Tegra186: trimmer value for non-tunable modes. - nvidia,default-trim : Specify the default outbound clock trimmer value. +- nvidia,dqs-trim : Specify DQS trim value for HS400 timing Notes on the pad calibration pull up and pulldown offset values: - The property values are drive codes which are programmed into the
@@ -88,6 +89,8 @@ Optional properties for Tegra210 and Tegra186: - The values are programmed to the Vendor Clock Control Register. Please refer to the reference manual of the SoC for correct values. + - The DQS trim values are only used on controllers which support + HS400 timing. Example: sdhci@700b0000 {
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2.7.4