Re: [PATCH 5/9] RISC-V: implement low-level interrupt handling
From: Christoph Hellwig <hch@lst.de>
Date: 2018-08-02 09:54:35
Also in:
linux-riscv, lkml
From: Christoph Hellwig <hch@lst.de>
Date: 2018-08-02 09:54:35
Also in:
linux-riscv, lkml
On Thu, Aug 02, 2018 at 11:48:55AM +0200, Thomas Gleixner wrote:
quoted
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 9aaf6c986771..fa2c08e3c05e 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S@@ -168,8 +168,8 @@ ENTRY(handle_exception) /* Handle interrupts */ move a0, sp /* pt_regs */ - REG_L a1, handle_arch_irq - jr a1 + move a1, s4 /* scause */ + tail do_IRQWhat's the reason for doing the whole exception dance in ASM ?
I'll let Palmer defend it. But for now I just want minimal changes to actually get a booting system..