Thread (36 messages) 36 messages, 6 authors, 2018-08-02

Re: [PATCH 7/9] irqchip: add a RISC-V PLIC driver

From: Atish Patra <hidden>
Date: 2018-08-02 01:02:56
Also in: linux-riscv, lkml

On 8/1/18 7:14 AM, Christoph Hellwig wrote:
I've pushed out an update to the riscv-irq-simple.2 branch to better
handle with sparse contexid maps, please retry with that.
I see you have changed the driver file name from irq-riscv-plic to 
irq-riscv-sifive along with default Y for SIFIVE_PLIC. I guess it was 
done because PLIC register spec is SIFIVE specific rather than RISC-V.

But can we keep the new kconfig option "SIFIVE_PLIC" enabled in 
driver/irqchip/Kconfig or arch/riscv/Kconfig for now to avoid breakage 
without linux_defconfig update.

With the config enabled, Qemu virt machine booting has no issues with 
riscv-irq-simple.2 branch. I am still looking at the crash from the 
hardware.

Regards,
Atish
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