Re: [PATCH v2 4/4] ARM: dts: dra7: Fix up unaligned access setting for PCIe EP
From: Kishon Vijay Abraham I <hidden>
Date: 2018-07-17 09:56:04
Also in:
linux-omap, linux-pci, lkml
On Wednesday 27 June 2018 05:59 PM, Vignesh R wrote:
Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are incorrectly documented in the TRM. In fact, the bit positions are swapped. Update the DT bindings for PCIe EP to reflect the same. Signed-off-by: Vignesh R <vigneshr@ti.com>
Shouldn't this be sent to stable fixes? Thanks Kishon
quoted hunk ↗ jump to hunk
--- arch/arm/boot/dts/dra7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 7bfe7f28e3bd..27ad193e1a87 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi@@ -355,7 +355,7 @@ ti,hwmods = "pcie1"; phys = <&pcie1_phy>; phy-names = "pcie-phy0"; - ti,syscon-unaligned-access = <&scm_conf1 0x14 2>; + ti,syscon-unaligned-access = <&scm_conf1 0x14 1>; status = "disabled"; }; };