Thread (111 messages) 111 messages, 5 authors, 2018-02-06

Re: [PATCH v6 29/36] nds32: Build infrastructure

From: Greentime Hu <hidden>
Date: 2018-01-22 16:00:34
Also in: linux-arch, linux-serial, lkml, netdev

Hi, Arnd:

2018-01-22 23:38 GMT+08:00 Arnd Bergmann [off-list ref]:
On Mon, Jan 22, 2018 at 4:20 PM, Greentime Hu [off-list ref] wrote:
BE
quoted
quoted
I think it's better to drop GENERIC_IRQ_PROBE here, no modern driver
should rely on that.
I will drop it.
quoted
quoted
+choice
+       prompt "CPU type"
+       default CPU_V3
+config CPU_N15
+       bool "AndesCore N15"
+config CPU_N13
+       bool "AndesCore N13"
+       select CPU_CACHE_ALIASING if ANDES_PAGE_SIZE_4KB
+config CPU_N10
+       bool "AndesCore N10"
+       select CPU_CACHE_ALIASING
+config CPU_D15
+       bool "AndesCore D15"
+config CPU_D10
+       bool "AndesCore D10"
+       select CPU_CACHE_ALIASING
+config CPU_V3
+       bool "AndesCore v3 compatible"
+       select ANDES_PAGE_SIZE_8KB
+endchoice
I forget what we discussed here earlier, but at the very least, there should be
some help text here to explain what the implications are. I assume that you
generally want to be able to build one kernel to run on all of the above, right?

Will selecting 'CPU_V3' result in a kernel binary that can run on all of them?
If so, please explain it here as that is not obvious.

For the other CPU types, can you list the what backwards-compatiblity
you get? E.g. will a kernel built for N13 run on any of N15, D15 or N10?
Yes, we would like to build a kernel with CPU_V3 to run on all of the above.

Not sure if these help texts clear enough?

choice
        prompt "CPU type"
        default CPU_V3
        help
          The data cache of N15/D15 is implemented as PIPT and it will
not cause the
          cache aliasing issue. The rest cpus(N13, N10 and D10) are
implemented as
          VIPT data cache. It may cause the cache aliasing issue if
its cache way
          size is larger than page size. You can specify the the CPU
type direcly or
          choose CPU_V3 if unsure.

          A kernel built for N10 is able to run on N15, D15, N13, N10 or D10.
          A kernel built for N15 is able to run on N15 or D15.
          A kernel built for D10 is able to run on D10 or D15.
          A kernel built for D15 is able to run on D15.
          A kernel built for N13 with CPU_CACHE_ALIASING is able to
run on N15, D15, N13, N10 or D10
          A kernel built for N13 without CPU_CACHE_ALIASING is able to
run on N15, N13 or D15

config CPU_N15
        bool "AndesCore N15"
config CPU_N13
        bool "AndesCore N13"
        select CPU_CACHE_ALIASING if ANDES_PAGE_SIZE_4KB
config CPU_N10
        bool "AndesCore N10"
        select CPU_CACHE_ALIASING
config CPU_D15
        bool "AndesCore D15"
config CPU_D10
        bool "AndesCore D10"
        select CPU_CACHE_ALIASING
config CPU_V3
        bool "AndesCore v3 compatible"
        select CPU_CACHE_ALIASING
endchoice
I would drop the description about CPU_CACHE_ALIASING in the list
of compatibilities text and simply say 'A kernel built for N13 is able to run
on N15, N13 or D15', it's more logical that way, and it gives you the freedom
to later change the rules about whether it can or cannot run.

Maybe also change the initial prompt from "CPU type" to "minimum CPU type".
Thank you for your suggestion.
I will update it like this.

choice
        prompt "minimum CPU type"
        default CPU_V3
        help
          The data cache of N15/D15 is implemented as PIPT and it will not cause
          the cache aliasing issue. The rest cpus(N13, N10 and D10) are
          implemented as VIPT data cache. It may cause the cache aliasing issue
          if its cache way size is larger than page size. You can specify the
          CPU type direcly or choose CPU_V3 if unsure.

          A kernel built for N10 is able to run on N15, D15, N13, N10 or D10.
          A kernel built for N15 is able to run on N15 or D15.
          A kernel built for D10 is able to run on D10 or D15.
          A kernel built for D15 is able to run on D15.
          A kernel built for N13 is able to run on N15, N13 or D15.

config CPU_N15
        bool "AndesCore N15"
config CPU_N13
        bool "AndesCore N13"
        select CPU_CACHE_ALIASING if ANDES_PAGE_SIZE_4KB
config CPU_N10
        bool "AndesCore N10"
        select CPU_CACHE_ALIASING
config CPU_D15
        bool "AndesCore D15"
config CPU_D10
        bool "AndesCore D10"
        select CPU_CACHE_ALIASING
config CPU_V3
        bool "AndesCore v3 compatible"
        select CPU_CACHE_ALIASING
endchoice
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help