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+ /* Switch from master mode to slave mode. */
+ func_ctrl_reg_val = aspeed_i2c_read(bus, ASPEED_I2C_FUN_CTRL_REG);
+ func_ctrl_reg_val &= ~ASPEED_I2CD_MASTER_EN;
+ func_ctrl_reg_val |= ASPEED_I2CD_SLAVE_EN;
+ aspeed_i2c_write(bus, func_ctrl_reg_val, ASPEED_I2C_FUN_CTRL_REG);
Can't the hardware work both as master and slave on the same bus?
The hardware can work as master and slave on the same bus. This is how IPMB over i2c works on Aspeed.
I no longer disable master when a slave is registered. I was concerned
about adding multimaster support because I don't think it will play
nicely with bus recovery; should we maybe provide a device tree option
to turn multimaster support on which will disable bus recovery, since
someone else might be using it?
Thanks! Then the driver should support this. Maybe it is an idea to
first upstream the master support and add the slave support
incrementally?
Yeah, probably a good idea. Slave support is now added in
https://lkml.org/lkml/2017/3/28/22.
Regards,
Wolfram