On 11/29, Vivek Gautam wrote:

On Tue, Nov 29, 2016 at 4:25 AM, Stephen Boyd [off-list ref] wrote:

quoted

On 11/22, Vivek Gautam wrote:

quoted

diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
new file mode 100644
index 0000000..ffb173b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt

@@ -0,0 +1,74 @@

quoted

quoted

+                     "pipe<port-number>" for pipe clock specific to
+                     each port/lane (Optional).

The pipe clocks are orphaned right now. We should add an output
clock from the phy to go into the controller and back into the
phy if I recall correctly. The phy should be a clock provider
itself so it can output the pipe clock source into GCC and back
into the phy and controller.

quoted

+ - resets: a list of phandles and reset controller specifier pairs,
+        one for each entry in reset-names.
+ - reset-names: must be "phy" for reset of phy block,
+                     "common" for phy common block reset,
+                     "cfg" for phy's ahb cfg block reset (Optional).
+                     "port<port-number>" for reset specific to
+                     each port/lane (Optional).
+ - vdda-phy-supply: Phandle to a regulator supply to PHY core block.
+ - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
+
+Optional properties:
+ - vddp-ref-clk-supply: Phandle to a regulator supply to any specific refclk
+                     pll block.
+
+Example:
+     pcie_phy: pciephy@34000 {

pcie-phy or just phy as the node name?

How about just 'phy'? The label pcie_phy anyways explains the use.

phy is a great color choice for the shed.

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