Re: [PATCH v2 2/3] clocksource: update "fn" at CLOCKSOURCE_OF_DECLARE() of nps400 timer
From: Daniel Lezcano <hidden>
Date: 2016-10-31 10:28:28
Also in:
lkml
On Sun, Oct 23, 2016 at 03:12:27PM +0300, Noam Camus wrote:
From: Noam Camus <noamca-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org> nps_setup_clocksource() should take node as only argument i.e.: replace int __init nps_setup_clocksource(struct device_node *node, struct clk *clk) with int __init nps_setup_clocksource(struct device_node *node) This is also serve as preperation for next patch which adds support
s/preperation/preparation/
quoted hunk ↗ jump to hunk
for clockevents to nps400. Specifically we add new function nps_get_timer_clk() to serve clocksource and later clockevent registration. Signed-off-by: Noam Camus <noamca-VPRAkNaXOzVWk0Htik3J/w@public.gmane.org> --- drivers/clocksource/timer-nps.c | 49 ++++++++++++++++++++------------------ 1 files changed, 26 insertions(+), 23 deletions(-)diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c index 70c149a..6156e54 100644 --- a/drivers/clocksource/timer-nps.c +++ b/drivers/clocksource/timer-nps.c@@ -47,6 +47,28 @@ static void *nps_msu_reg_low_addr[NPS_CLUSTER_NUM] __read_mostly; static unsigned long nps_timer_rate; +static int nps_get_timer_clk(struct device_node *node, + unsigned long *timer_freq, + struct clk *clk)
This function prototype does not make sense. A pointer to a clock is passed for nothing here.
+{
+ int ret;
+
+ clk = of_clk_get(node, 0);
+ if (IS_ERR(clk)) {
+ pr_err("timer missing clk");
+ return PTR_ERR(clk);
+ }
+
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ pr_err("Couldn't enable parent clk\n");
+ return ret;
+ }
+
+ *timer_freq = clk_get_rate(clk);
+timer_freq check. rollback on error.
quoted hunk ↗ jump to hunk
+ return 0; +} static cycle_t nps_clksrc_read(struct clocksource *clksrc) {@@ -55,23 +77,17 @@ static cycle_t nps_clksrc_read(struct clocksource *clksrc) return (cycle_t)ioread32be(nps_msu_reg_low_addr[cluster]); } -static int __init nps_setup_clocksource(struct device_node *node, - struct clk *clk) +static int __init nps_setup_clocksource(struct device_node *node) { int ret, cluster; + struct clk *clk; for (cluster = 0; cluster < NPS_CLUSTER_NUM; cluster++) nps_msu_reg_low_addr[cluster] = nps_host_reg((cluster << NPS_CLUSTER_OFFSET), NPS_MSU_BLKID, NPS_MSU_TICK_LOW); - ret = clk_prepare_enable(clk); - if (ret) { - pr_err("Couldn't enable parent clock\n"); - return ret; - } - - nps_timer_rate = clk_get_rate(clk); + nps_get_timer_clk(node, &nps_timer_rate, clk);
Return code check ?
quoted hunk ↗ jump to hunk
ret = clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick", nps_timer_rate, 301, 32, nps_clksrc_read);@@ -83,18 +99,5 @@ static int __init nps_setup_clocksource(struct device_node *node, return ret; } -static int __init nps_timer_init(struct device_node *node) -{ - struct clk *clk; - - clk = of_clk_get(node, 0); - if (IS_ERR(clk)) { - pr_err("Can't get timer clock.\n"); - return PTR_ERR(clk); - } - - return nps_setup_clocksource(node, clk); -} - CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer", - nps_timer_init); + nps_setup_clocksource);-- 1.7.1
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