[PATCH 3/5] ARM: dts: sunxi: Add the SPDIF to the A10 and A20
From: <hidden>
Date: 2016-02-27 16:18:27
Also in:
linux-arm-kernel
Subsystem:
the rest · Maintainer:
Linus Torvalds
Possibly related (same subject, not in this thread)
- 2016-03-14 · Re: [PATCH 3/5] ARM: dts: sunxi: Add the SPDIF to the A10 and A20 · Maxime Ripard <hidden>
- 2016-03-14 · Re: [PATCH 3/5] ARM: dts: sunxi: Add the SPDIF to the A10 and A20 · Code Kipper <hidden>
- 2016-03-13 · Re: [PATCH 3/5] ARM: dts: sunxi: Add the SPDIF to the A10 and A20 · Maxime Ripard <hidden>
From: Marcus Cooper <redacted> Add the SPDIF transceiver controller and clock to the A10 and A20 dtsi. Signed-off-by: Marcus Cooper <redacted> --- arch/arm/boot/dts/sun4i-a10.dtsi | 23 +++++++++++++++++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 23 +++++++++++++++++++++++ 2 files changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 0483640..83d46b2 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi@@ -477,6 +477,17 @@ clock-output-names = "ir1"; }; + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + usb_clk: clk@01c200cc { #clock-cells = <1>; #reset-cells = <1>;
@@ -1055,6 +1066,18 @@ status = "disabled"; }; + spdif: spdif@01c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-spdif"; + reg = <0x01c21000 0x40>; + interrupts = <13>; + clocks = <&apb0_gates 1>, <&spdif_clk>; + clock-names = "apb", "spdif"; + dmas = <&dma 0 2>, <&dma 0 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 7264d5e..4631660 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi@@ -476,6 +476,17 @@ clock-output-names = "ir1"; }; + spdif_clk: clk@01c200c0 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod1-clk"; + reg = <0x01c200c0 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_8X>, + <&pll2 SUN4I_A10_PLL2_4X>, + <&pll2 SUN4I_A10_PLL2_2X>, + <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "spdif"; + }; + keypad_clk: clk@01c200c4 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk";
@@ -1247,6 +1258,18 @@ status = "disabled"; }; + spdif: spdif@01c21000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-spdif"; + reg = <0x01c21000 0x40>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 1>, <&spdif_clk>; + clock-names = "apb", "spdif"; + dmas = <&dma 0 2>, <&dma 0 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>;
--
2.7.1