On Fri, Oct 24, 2014 at 08:52:26PM +0200, Corentin LABBE wrote:

On 10/21/14 21:11, Maxime Ripard wrote:

quoted

Hi Corentin,

Thanks for resending it.

On Sun, Oct 19, 2014 at 04:16:22PM +0200, LABBE Corentin wrote:

quoted

Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support AES/MD5/SHA1/DES/3DES/PRNG algorithms.

Signed-off-by: LABBE Corentin <redacted>
---
 drivers/crypto/Kconfig                    |  17 ++
+static int sunxi_ss_aes_poll_atomic(struct ablkcipher_request *areq)
+{
+	u32 spaces;
+	struct scatterlist *in_sg = areq->src;
+	struct scatterlist *out_sg = areq->dst;
+	void *src_addr;
+	void *dst_addr;
+	unsigned int ileft = areq->nbytes;
+	unsigned int oleft = areq->nbytes;
+	unsigned int todo;
+	u32 *src32;
+	u32 *dst32;
+	u32 rx_cnt = 32;
+	u32 tx_cnt = 0;
+	int i;
+
+	src_addr = kmap_atomic(sg_page(in_sg)) + in_sg->offset;

Where does this scatter_list is coming from? Can it even be allocated
in highmem?

With AF_ALG and cryptodev, the SG is in highmem. Verified with some
PageHighMem().

Then fix AF_ALG and cryptodev, because all of the other drivers might
be affected.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com