Thread (21 messages) 21 messages, 5 authors, 2014-11-04

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

From: Qais Yousef <hidden>
Date: 2014-10-29 11:01:47
Also in: linux-mips, lkml

On 10/29/2014 12:12 AM, Andrew Bresticker wrote:
+- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors
+  to which the GIC may route interrupts.  May contain up to 6 entries, one
+  for each of the CPU's hardware interrupt vectors.  Valid values are 2 - 7.
+  This property is ignored if the CPU is started in EIC mode.
+
Wouldn't it be better to have this in the reversed sense ie: 
mti,nonavailable-cpu-vectors? I think the assumption that by default 
they're all available unless something else is connected to them which 
is unlikely in most cases. It can be made optional property then.

I don't have a strong opinion about it though.

Qais
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help