Re: [PATCH v4] ARM: perf: save/restore pmu registers in pm notifier

Hi Neil,

On 20/10/14 09:46, Neil Zhang wrote:

quoted

-----Original Message----- From: Will Deacon
[mailto:will.deacon-5wv7dgnIgG8@public.gmane.org] Sent: 2014年7月4日 1:57 To: Neil Zhang
Cc: Sudeep Holla; 'linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org'; 'linux-arm-
kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org'; 'linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org';
'devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org' Subject: Re: [PATCH v4] ARM: perf:
save/restore pmu registers in pm notifier

On Mon, Jun 30, 2014 at 11:39:15AM +0100, Neil Zhang wrote:

quoted

quoted

quoted

quoted

I will prepare another patch to add DT description under
PMU since there is no generic power domain support for pm
notifier if no other concerns. We can change the manner if
there is generic power domain support for pm notifier
later. Thanks.

No, please don't add any DT bindings for power domains
specific to PMU node. We can't change the DT bindings once
added.

As I pointed out the DT bindings for generic power domains
are under discussion. See if you can reuse it, if not help in
extending it so that it can be used.

Sorry for reply later. As I said before the under discussed
generic power domain is not suitable for CPU peripherals since
 they are all known belong to CPU or cluster power domain. If
we want to follow the way they are discussion, we need to
register core and cluster power provider, and need vfp/gic/pmu
etc to require them.
Is it really suitable?

Do you have any comments? If no, I would like to put it under PMU
node.

Sudeep is a better person to comment than me, but I'd still rather
 this was handled more generically as opposed to a PMU-specific
hack. I don't see a problem including GIC and VFP here, but only
when we actually need to save/restore them (i.e. what the hardware
 guys went crazy with the power domains).

Long time no follow up for this loop. Sorry that I will pick it
again.

Yes, the generic PD got added in v3.18-rc1, it's better to check if we
can reuse it. I will also have a look at that and think about how we can
use it.

Will, I prefer to check always-on field under PMU node to check
whether we need Save/restore them.

But how do you handle it for different idle states. e.g. if CPU is in
retention, PMU's *might be* retained. Also I don't think PMUs will be
placed in "always-on" power domain like timers. So using "always-on"
sounds incorrect to me.

Regards,
Sudeep

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