Thread (31 messages) flat view 31 messages, 7 authors, 2014-09-16

Re: [PATCH v2] clocksource: arch_timer: Allow the device tree to specify the physical timer

From: Stephen Boyd <hidden>
Date: 2014-09-12 18:59:33
Also in: linux-arm-kernel, lkml

On 09/12/14 05:14, Marc Zyngier wrote:
Hi Christopher,

On 12/09/14 12:43, Christopher Covington wrote:
quoted
Hi Marc,

On 09/11/2014 01:43 PM, Marc Zyngier wrote:
quoted
On 11/09/14 18:29, Doug Anderson wrote:
quoted
I did this in the past (again, see Sonny's thread), but didn't
consider myself knowledgeable to know if that was truly a good test:

       asm volatile("mrc p15, 0, %0, c1, c1, 0" : "=r" (val));
       pr_info("DOUG: val is %#010x", val);
       val |= (1 << 2);
       asm volatile("mcr p15, 0, %0, c1, c1, 0" : : "r" (val));
       val = 0xffffffff;
       asm volatile("mrc p15, 0, %0, c1, c1, 0" : "=r" (val));
       pr_info("DOUG: val is %#010x", val);

The idea being that if you can make modifications to the SCR register
(and see your changes take effect) then you must be in secure mode.
In my case the first printout was 0x0 and the second was 0x4.
The main issue is when you're *not* in secure mode. It is likely that
this will explode badly. This is why I suggested something that is set
by the bootloader (after all. it knows which mode it is booted in), and
that the timer driver can use when the CPU comes up.
What exactly does "exploding badly" look like? Causing and undefined
instruction exception? That's just a branch with a mode switch. Any reason the
code couldn't deal with that or even use that to its advantage?
We surely can handle the UNDEF and do something there. We just can't do
it the way Doug described it above.
I suggested doing that for something else a while ago and Will and Dave
we're not thrilled[1]. The suggestion back then was to use DT to
indicate what mode the kernel is running in.

[1]
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-June/105321.html

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