On Thu, Sep 11, 2014 at 05:59:53PM +0100, Doug Anderson wrote:
On Thu, Sep 11, 2014 at 9:47 AM, Will Deacon [off-list ref] wrote:
quoted
I'd say `Only supported for ARM' to better match what we've done. Probably
also worth mentioning that this relies on the hypervisor/firmware having set
CNTHCTL.PL1PCEN and CNTHCTL.EL1PCTEN (but assumedly made a mess of CNTVOFF
;) if you want to boot on the non-secure side (e.g. as a guest).
Note that the reset value of CNTHCTL.PL1PCEN and CNTHCTL.PL1PCTEN are
both 1 in my version of the ARM ARM. On the other hand CNTVOFF is
documented to have an UNKNOWN reset value. If only ARM had guaranteed
that CNTVOFF started out as 0 (which seems like it would have been
sensible) we wouldn't be in this mess. :-/
I'm afraid we went the opposite way -- in ARMv8 there are a tiny handful
of EL3 registers that are well-defined out of reset, then the rest of the
system is UNKNOWN. The hardware guys prefer that and it can also be useful
for very low-level debugging (system crashes, do a reset, read out the
state).
Will