Re: [PATCH v6 12/14] crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs

On Mon, Aug 5, 2019 at 1:23 AM Horia Geanta [off-list ref] wrote:

On 7/17/2019 6:25 PM, Andrey Smirnov wrote:

quoted

i.MX8 SoC still use 32-bit addresses in its CAAM implmentation, so

i.MX8 SoC or i.MX8 mScale?
Looking at the documentation, some i.MX8 parts (for e.g. QM and QXP)
allow for 36-bit addresses.

mScale. Will update the message.

quoted

change all of the code to be able to handle that.

Shouldn't this case (32-bit CAAM and CONFIG_ARCH_DMA_ADDR_T_64BIT=y) work
for any ARMv8 SoC, i.e. how is this i.MX-specific?

It's a generic change.

quoted

@@ -603,11 +603,13 @@ static int caam_probe(struct platform_device *pdev)
              ret = init_clocks(dev, ctrlpriv, imx_soc_match->data);
              if (ret)
                      return ret;
+
+             caam_ptr_sz = sizeof(u32);
+     } else {
+             caam_ptr_sz = sizeof(dma_addr_t);

caam_ptr_sz should be deduced by reading MCFGR[PS] bit, i.e. decoupled
from dma_addr_t.

MCFGR[PS] is not mentioned in i.MX8MQ SRM and MCFG_PS in CTPR_MS is
documented as set to "0" (seems to match in real HW as well). Doesn't
seem like a workable solution for i.MX8MQ. Is there something I am
missing?

There is another configuration that should be considered
(even though highly unlikely):
caam_ptr_sz=1  - > 32-bit addresses for CAAM
CONFIG_ARCH_DMA_ADDR_T_64BIT=n - 32-bit dma_addr_t
so the logic has to be carefully evaluated.

I don't understand what you mean here. 32-bit CAAM + 32-bit dma_addr_t
should already be the case for i.MX6, etc. how is what you describe
different?

quoted

@@ -191,7 +191,8 @@ static inline u64 caam_dma64_to_cpu(u64 value)

 static inline u64 cpu_to_caam_dma(u64 value)
 {
-     if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT))
+     if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) &&
+         !caam_imx)

Related to my previous comment (i.MX-specific vs. SoC-generic),
this should probably change to smth. like: caam_ptr_sz == sizeof(u64)

Makes sense, will do here and in other places.

Thanks,
Andrey Smirnov