Thread (4 messages) 4 messages, 2 authors, 2021-02-14

RE: [PATCH] clk: qoriq: use macros to generate pll_mask

From: Wasim Khan (OSS) <hidden>
Date: 2021-02-12 05:24:53

Hi Stephen,
-----Original Message-----
From: Stephen Boyd <sboyd@kernel.org>
Sent: Friday, February 12, 2021 9:02 AM
To: Varun Sethi <redacted>; Wasim Khan (OSS)
[off-list ref]; mturquette@baylibre.com
Cc: linux-clk@vger.kernel.org; Wasim Khan <redacted>
Subject: Re: [PATCH] clk: qoriq: use macros to generate pll_mask

Quoting Wasim Khan (2021-01-25 06:25:13)
quoted
From: Wasim Khan <redacted>

Use macros to generate pll_mask to make code more readable.

Signed-off-by: Wasim Khan <redacted>
---
 drivers/clk/clk-qoriq.c | 62
++++++++++++++++++++++++++++-------------
 1 file changed, 43 insertions(+), 19 deletions(-)
The code also got longer. Why is this better?
Thank you for the review.
Hardcoded values of pll_mask were difficult to understand that what all CGx and PLLy are used for a given platform. 
Also the bit[4] can be 1 for CGA_PLL4 or CBG_PLL1 both , so the hardcoded value does not tell which PLL is used (CGA_PLL4  or CBG_PLL1) and only way to know this is to refer the SoC reference manual.
To avoid this ambiguity, let us use CGx_PLLy macros to clearly know the cluster group plls mapping for a given platform.
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