Thread (54 messages) 54 messages, 5 authors, 2016-07-12

Re: [PATCH 02/13] irq: Introduce IRQD_AFFINITY_MANAGED flag

From: Alexander Gordeev <hidden>
Date: 2016-06-22 11:58:06
Also in: linux-nvme, linux-pci, lkml

On Thu, Jun 16, 2016 at 11:19:51AM -0400, Keith Busch wrote:
On Wed, Jun 15, 2016 at 10:50:53PM +0200, Bart Van Assche wrote:
quoted
Does it matter on x86 systems whether or not these interrupt vectors are
also associated with a CPU with a higher CPU number? Although multiple bits
can be set in /proc/irq/<n>/smp_affinity only the first bit counts on x86
platforms. In default_cpu_mask_to_apicid_and() it is easy to see that only
the first bit that has been set in that mask counts on x86 systems.
Wow, thanks for the information. I didn't know the apic wasn't using
the full cpu mask, so this changes how I need to look at this, and will
experiment with such a configuration.
I have vague memories of this, but you probably need to check PPC as well.
Its interrupt distribution is not straightforward as well, AFAIR.

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