Thread (38 messages) 38 messages, 7 authors, 4d ago

Re: [PATCH v5 13/21] drm/bridge: inno-hdmi: Make the register clock source selectable

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From: Maud Spierings <hidden>
Date: 2026-10-01 15:38:39
Also in: dri-devel, linux-clk, linux-devicetree, linux-phy, linux-riscv, linux-rockchip, lkml

Hi Michal,

Can confirm that this is fixed now! Thanks for integrating this!

Tested-by: Maud Spierings <redacted>

Kind regards,
Maud

On 9/29/26 12:31, Michal Wilczynski wrote:
quoted hunk ↗ jump to hunk
inno_hdmi_init_hw() drives the register interface from the system clock
on every platform, by setting v_REG_CLK_SOURCE_SYS unconditionally in
HDMI_SYS_CTRL.

That is not right everywhere. On the JH7110 a Framework 13 (fml13v01)
panel flickers continuously with the system clock selected and behaves
once the TMDS clock drives the register interface instead. Maud Spierings
found this by diffing HDMI_SYS_CTRL against the StarFive vendor kernel,
which leaves the bit clear.

Add a plat_data flag for it rather than changing the bit for everyone.
The Rockchip integrations keep the system clock, so this is a no-op for
them; only a platform that asks for it gets the TMDS clock.

Reported-by: Maud Spierings <redacted>
Closes: https://lore.kernel.org/all/e780ecb8-918f-4816-99c8-b69b10b25a18@murena.io/ (local)
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
---
  drivers/gpu/drm/bridge/inno-hdmi.c | 4 +++-
  include/drm/bridge/inno_hdmi.h     | 2 ++
  2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/inno-hdmi.c b/drivers/gpu/drm/bridge/inno-hdmi.c
index 56f7d41cdae49ae872599a86799412c421158369..db92013a3b1e7c1b6668e9257523a0ca8d2c23d7 100644
--- a/drivers/gpu/drm/bridge/inno-hdmi.c
+++ b/drivers/gpu/drm/bridge/inno-hdmi.c
@@ -580,7 +580,9 @@ static void inno_hdmi_init_hw(struct inno_hdmi *hdmi)
  	usleep_range(100, 150);
  
  	msk = m_REG_CLK_INV | m_REG_CLK_SOURCE | m_POWER | m_INT_POL;
-	val = v_REG_CLK_INV | v_REG_CLK_SOURCE_SYS | v_PWR_ON | v_INT_POL_HIGH;
+	val = v_REG_CLK_INV | v_PWR_ON | v_INT_POL_HIGH;
+	val |= hdmi->plat_data->reg_clk_source_tmds ? v_REG_CLK_SOURCE_TMDS :
+						      v_REG_CLK_SOURCE_SYS;
  	hdmi_modb(hdmi, HDMI_SYS_CTRL, msk, val);
  
  	inno_hdmi_standby(hdmi);
diff --git a/include/drm/bridge/inno_hdmi.h b/include/drm/bridge/inno_hdmi.h
index 1e9974401c39e3773bb339eaec0b45ff1dd9c975..620f035eb9846762ff91cd933b30e07eaeeae8ed 100644
--- a/include/drm/bridge/inno_hdmi.h
+++ b/include/drm/bridge/inno_hdmi.h
@@ -32,6 +32,8 @@ struct inno_hdmi_plat_data {
  	const struct inno_hdmi_plat_ops *ops;
  	struct inno_hdmi_phy_config *phy_configs;
  	struct inno_hdmi_phy_config *default_phy_config;
+	/* Clock the register interface from the TMDS clock, not the system clock. */
+	bool reg_clk_source_tmds;
  };
  
  struct inno_hdmi *inno_hdmi_bind(struct device *pdev,
  
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