[PATCH v4 11/11] media: imx8-isi: Enable RAW10/12/14 output LSB alignment on i.MX952
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COLD20d
REVIEWED: 1 (1M)
From: Guoniu Zhou <hidden>
Date: 2026-09-29 08:49:31
Also in:
imx, linux-devicetree, linux-media, lkml
Subsystem:
media input infrastructure (v4l/dvb), nxp i.mx 8m isi driver, the rest · Maintainers:
Mauro Carvalho Chehab, Laurent Pinchart, Linus Torvalds
1 review trailer (1 from subsystem maintainers).
Before i.MX952, the ISI RAW10/12/14 output formats are always
MSB-aligned, which is not compatible with the V4L2 RAW format
definition that requires LSB alignment.
From i.MX952 onwards, the ISI introduces CHNL_CTRL_RAW_OUT_LSB_ALIGN
to select whether RAW10/12/14 outputs are MSB or LSB aligned. Enable
it so the driver produces correct V4L2-compatible LSB-aligned output.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <redacted>
---
Changes in v4:
- Split RAW_IN_MSB_ALIGN into a separate preceding patch
- Split RAW format table and RAW14 changes into separate preceding patches
- Move isi_out_raw_shifted() to regs.h in the preceding workaround patch
- Rewrite commit message
Changes in v3:
- Use CHNL_IMG_CTRL_FORMAT_MASK instead of the removed per-platform format_mask (Laurent)
- Derive raw_out_lsb from the model field instead of dedicated platform data (Laurent)
- Clarify the CHNL_IMG_CTRL_FORMAT_RAW14 comment: the format is
documented on i.MX{8ULP,91,93,95,952} but only used on i.MX952
- Update the mxc_isi_channel_set_output_format() comment wording
- Rewrite commit message
- Add Reviewed-by tag from Frank
---
drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 37 +++++++++++++++++++---
.../media/platform/nxp/imx8-isi/imx8-isi-regs.h | 5 +--
2 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
index b3f32b9796d5..6733776e72aa 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c@@ -311,12 +311,24 @@ static void mxc_isi_channel_set_panic_threshold(struct mxc_isi_pipe *pipe) * RAW samples from either the high or low bits, as both LSB and MSB * alignment can be selected in the gasket. * - * On i.MX95, the CSI formatter provides MSB-aligned RAW data, so the ISI - * must select RAW samples from the high bits of the Pixel Link bus. + * Starting with i.MX95, the CSI formatter provides MSB-aligned RAW data, + * so the ISI must select RAW samples from the high bits of the Pixel Link + * bus. */ static bool isi_raw_in_msb(const struct mxc_isi_plat_data *pdata) { - return pdata->model == MXC_ISI_IMX95; + return pdata->model == MXC_ISI_IMX95 || + pdata->model == MXC_ISI_IMX952; +} + +/* + * Starting with i.MX952, the ISI can output RAW10/12/14 formats with LSB + * alignment, matching the V4L2 requirement. Older platforms lack this + * capability and need the RAW16 workaround. + */ +static bool isi_raw_out_lsb(const struct mxc_isi_plat_data *pdata) +{ + return pdata->model == MXC_ISI_IMX952; } static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
@@ -377,6 +389,13 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe, if (isi_raw_in_msb(pipe->isi->pdata)) val |= CHNL_CTRL_RAW_IN_MSB_ALIGN; + /* + * Enable RAW10/12/14 output LSB alignment to match the + * V4L2 requirement that RAW formats are LSB-aligned. + */ + if (isi_raw_out_lsb(pipe->isi->pdata)) + val |= CHNL_CTRL_RAW_OUT_LSB_ALIGN; + mxc_isi_write(pipe, CHNL_CTRL, val); mutex_unlock(&pipe->lock);
@@ -430,13 +449,23 @@ void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe, const struct mxc_isi_format_info *info, struct v4l2_pix_format_mplane *format) { + const struct mxc_isi_plat_data *pdata = pipe->isi->pdata; u32 val; u32 fmt; /* set outbuf format */ dev_dbg(pipe->isi->dev, "output format %p4cc", &format->pixelformat); - fmt = isi_out_raw_shifted(info->isi_out_format) + /* + * Before i.MX952, the ISI shifts the 10/12/14-bit formats left + * by 6, 4 and 2 bits when using CHNL_IMG_CTRL_FORMAT_RAW10/12/14 + * respectively, to align the bits to the left and pad with zeros in + * the LSBs. The corresponding V4L2 formats are however right-aligned, + * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift. + * Starting with i.MX952, the ISI supports RAW10/12/14 LSB output + * alignment, so skip the above workaround. + */ + fmt = !isi_raw_out_lsb(pdata) && isi_out_raw_shifted(info->isi_out_format) ? CHNL_IMG_CTRL_FORMAT_RAW16 : info->isi_out_format;
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
index d2b8a26b7c21..075fc6848213 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h@@ -20,7 +20,8 @@ #define CHNL_CTRL_CHAIN_BUF_NO_CHAIN 0 #define CHNL_CTRL_CHAIN_BUF_2_CHAIN 1 #define CHNL_CTRL_SW_RST BIT(24) -#define CHNL_CTRL_RAW_IN_MSB_ALIGN BIT(22) /* i.MX{91,93,95} */ +#define CHNL_CTRL_RAW_OUT_LSB_ALIGN BIT(23) /* i.MX952 only */ +#define CHNL_CTRL_RAW_IN_MSB_ALIGN BIT(22) /* i.MX{91,93,95,952} */ /* * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
@@ -90,7 +91,7 @@ #define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P 0x3a #define CHNL_IMG_CTRL_FORMAT_YUV420_2P12 0x3d #define CHNL_IMG_CTRL_FORMAT_YUV420_3P12 0x3e -#define CHNL_IMG_CTRL_FORMAT_RAW14 0x41 /* i.MX{8ULP,91,93,95} */ +#define CHNL_IMG_CTRL_FORMAT_RAW14 0x41 /* i.MX{8ULP,91,93,95,952}, used on i.MX952 only */ #define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n) ((n) << 16) #define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK GENMASK(23, 16)
--
2.34.1