[PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 1/9] dt-bindings: edac: aspeed: Add AST2700 SDRAM EDAC · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 3/9] EDAC/aspeed: Free the interrupt before the mem_ctl_info on remove · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 2/9] EDAC/aspeed: Set the DIMM grain · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
Re: [PATCH v3 2/9] EDAC/aspeed: Set the DIMM grain · Borislav Petkov <bp@alien8.de> · 2026-09-25
RE: [PATCH v3 2/9] EDAC/aspeed: Set the DIMM grain · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-29
[PATCH v3 5/9] EDAC/aspeed: Free the mem_ctl_info unconditionally on remove · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 7/9] EDAC/aspeed: Abstract SoC differences behind chip data · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 4/9] EDAC/aspeed: Clean up whitespace and include ordering · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 8/9] EDAC/aspeed: Add AST2700 support · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 6/9] EDAC/aspeed: Replace regmap with direct register access · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
[PATCH v3 9/9] MAINTAINERS: Add a reviewer for the Aspeed EDAC driver · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-16
RE: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-22
Re: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Borislav Petkov <bp@alien8.de> · 2026-09-22
RE: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-22
Re: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Borislav Petkov <bp@alien8.de> · 2026-09-25
RE: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-29
Re: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Borislav Petkov <bp@alien8.de> · 2026-09-29
RE: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support · Ryan Chen <ryan_chen@aspeedtech.com> · 2026-09-29

Re: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support

From: Borislav Petkov <bp@alien8.de>
Date: 2026-09-25 05:45:38
Also in: linux-aspeed, linux-devicetree, linux-edac, lkml, stable

On Wed, Sep 16, 2026 at 01:30:37PM +0800, Ryan Chen wrote:

Add ECC error reporting for the Aspeed AST2700 SoC to the existing
aspeed_edac driver.

The AST2700 memory controller keeps the same overall EDAC programming
model as the earlier Aspeed BMC SoCs, but uses a different register
layout, a split interrupt status/clear/mask scheme and DDR4/DDR5 memory.
Rather than fork the driver, the existing code is first tidied and
generalised, then the AST2700 is added as one more per-SoC variant.

Patches 2-5 are bug fixes and cleanups to the existing driver.

You always put the bug fixes first in a set. So it should be 1-4 bugfixes,
rest new features.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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