[PATCH v8 00/14] crypto: qce - Fix crypto self-test failures
From: Bartosz Golaszewski <hidden>
Date: 2026-09-21 12:58:52
Also in:
linux-arm-msm, linux-crypto, lkml, stable
This iteration - in addition to the previous fixes - proposes to split the QCE driver into a core part necessary to bind to the QCE DT node and enable runtime power management in order to allow to drop the interconnect votes, and the crypto part registering the crypto algorithms. The core module is then enabled in arm64 defconfig while the crypto part stays disabled by default. In addition: the actual registration of crypto algos is gated with a module parameter that default to false. Note that remaining reported bugs will still be fixed in follow-up series. This series addresses self-tests and disables the algos by default. The QCE hardware crypto engine has several limitations that cause it to produce incorrect results or stall on certain inputs. This series fixes several bugs and adds workaround allowing the deiver to pass crypto self-tests. The failures addressed are: - HMAC self-test failures for empty messages - AES-XTS returning success on zero-length input (should be -EINVAL) - AES-CTR: partial final block causes the engine to stall, output IV derivation was incorrect - AES-XTS with key1 == key2 is not supported by the CE - AES-CCM: partial final block and fragmented payload both stall the engine All fixes were tested on an SM8650 QRD board with CONFIG_CRYPTO_SELFTESTS=y and CONFIG_CRYPTO_SELFTESTS_FULL=y. Signed-off-by: Bartosz Golaszewski <redacted> --- Changes in v8: - Add a patch making the crypto driver *not* register algos by default but only if the user explicitly requests it with the provided module parameter - Use the "offloader" name for the crypto IP instead of "accelerator" - Fix device module table issues - Make the core driver use a list (despite it only having a single member now) of child auxiliary devices to register to make it clear we have the intention of extending this once we start the work on secure media playback - Link to v7: https://patch.msgid.link/20260910-qce-fix-self-tests-v7-0-cdbd2718af14@oss.qualcomm.com Changes in v7: - Add follow-up changes converting the QCE crypto driver to auxiliary bus, adding the core QCE driver under drivers/soc/ registering the auxiliary device and removing the BROKEN Kconfig label - Link to v6: https://patch.msgid.link/20260717-qce-fix-self-tests-v6-0-455775fe5f6c@oss.qualcomm.com Changes in v6: - Handle all zero-length HMAC finalizations (like imported state with data already hashed), not only the genuinely empty message case - Add an additional patch addressing the fragmented skcipher payload issue - Link to v5: https://patch.msgid.link/20260706-qce-fix-self-tests-v5-0-86f461ff1829@oss.qualcomm.com Changes in v5: - Dropped patch 1/8 that's already queued - Use the pre-allocated fallback ahash for HMAC transforms (Herbert) - Link to v4: https://patch.msgid.link/20260622-qce-fix-self-tests-v4-0-4f82ffa716c6@oss.qualcomm.com Changes in v4: - Remove remaining ECB and DES3 bits - Pick up tags - Link to v3: https://patch.msgid.link/20260617-qce-fix-self-tests-v3-0-ecc2b4dedcfd@oss.qualcomm.com Changes in v3: - Remove even more algorithms and dead code in patch 1/8 - Link to v2: https://patch.msgid.link/20260615-qce-fix-self-tests-v2-0-dc911f1aad42@oss.qualcomm.com Changes in v2: - Add fixes for the full suite of crypto self-tests - Add Fixes and Cc tags - Link to v1: https://patch.msgid.link/20260610-qce_selftest_fix-v1-0-1b0504783a46@oss.qualcomm.com/ --- Bartosz Golaszewski (12): crypto: qce - Fix HMAC self-test failures for empty messages crypto: qce - Reject empty messages for AES-XTS crypto: qce - Use a fallback for AES-CTR with a partial final block crypto: qce - Use fallback for fragmented skcipher payloads crypto: qce - Use a fallback for CCM with a partial final block crypto: qce - Use fallback for CCM with a fragmented payload crypto: qce - Only register algos if the user really wants it Revert "crypto: qce - Mark QCE as BROKEN" crypto: qce - convert to auxiliary bus soc: qcom: add core driver for the Qualcomm Crypto Engine arm64: defconfig: enable the Qualcomm Crypto Engine core driver arm: multi_v7_defconfig: enable the Qualcomm Crypto Engine core driver Kuldeep Singh (2): crypto: qce - Fix CTR-AES for partial block requests crypto: qce - Fix xts-aes-qce for weak keys arch/arm/configs/multi_v7_defconfig | 1 + arch/arm64/configs/defconfig | 1 + drivers/crypto/Kconfig | 18 ++++--- drivers/crypto/qce/aead.c | 44 ++++++++++++--- drivers/crypto/qce/cipher.h | 1 + drivers/crypto/qce/common.h | 1 - drivers/crypto/qce/core.c | 105 ++++++++++++++++++------------------ drivers/crypto/qce/core.h | 5 +- drivers/crypto/qce/sha.c | 70 ++++++++++++++++-------- drivers/crypto/qce/skcipher.c | 62 +++++++++++++++------ drivers/soc/qcom/Kconfig | 11 ++++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qce-core.c | 92 +++++++++++++++++++++++++++++++ 13 files changed, 305 insertions(+), 107 deletions(-) --- base-commit: 3fe766c979aa6145d9a72533ab32b9da30070767 change-id: 20260610-qce-fix-self-tests-492ffd2ef955 Best regards, -- Bartosz Golaszewski [off-list ref]