[PATCH v4 01/48] irqchip/gic-v5: Allow KVM setup without a maintenance IRQ
From: Sascha Bischoff <hidden>
Date: 2026-07-24 10:49:48
Also in:
kvm, kvmarm
Subsystem:
arm generic interrupt controller drivers, arm generic interrupt controller v5 drivers, irqchip drivers, the rest · Maintainers:
Marc Zyngier, Lorenzo Pieralisi, Thomas Gleixner, Linus Torvalds
GICv5 does not require a virtual CPU interface maintenance interrupt for native GCIE operation. The interrupt is only needed when FEAT_GCIE_LEGACY is present, as the legacy GICv3 interface still relies on maintenance IRQ delivery. Stop rejecting KVM setup solely because the maintenance interrupt is absent. Parse the interrupt if present, but if none is described and the system does not advertise FEAT_GCIE_LEGACY, tell KVM that no maintenance interrupt is required. This lets native GICv5 KVM support be registered on systems that do not provide a maintenance interrupt, while requiring a maintenance interrupt for GICv3-capable systems. Signed-off-by: Sascha Bischoff <redacted> --- drivers/irqchip/irq-gic-v5.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v5.c b/drivers/irqchip/irq-gic-v5.c
index e9d1795235a66..c04523a438cee 100644
--- a/drivers/irqchip/irq-gic-v5.c
+++ b/drivers/irqchip/irq-gic-v5.c@@ -1143,10 +1143,18 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) /* GIC Virtual CPU interface maintenance interrupt */ gic_v5_kvm_info.no_maint_irq_mask = false; gic_v5_kvm_info.maint_irq = irq_of_parse_and_map(node, 0); - if (!gic_v5_kvm_info.maint_irq) { - pr_warn("cannot find GICv5 virtual CPU interface maintenance interrupt\n"); - return; - } + + /* + * We require an MI if we have legacy support, but don't, otherwise. + * Given that there's an existing flag to convey that an MI isn't + * needed, we (ab)use it to tell KVM that the MI isn't needed if we + * don't support legacy. + * + * The check for ARM64_HAS_GICV5_LEGACY explicitly doesn't use + * cpus_have_final_cap() here as we run too early. + */ + if (!cpus_have_cap(ARM64_HAS_GICV5_LEGACY) && !gic_v5_kvm_info.maint_irq) + gic_v5_kvm_info.no_maint_irq_mask = true; vgic_set_kvm_info(&gic_v5_kvm_info); }
--
2.34.1