[PATCH 05/10] arm64: dts: st: Add SDMMC2 and SDMMC3 nodes on stm32mp231
From: Marek Vasut <hidden>
Date: 2026-07-11 21:01:58
Also in:
linux-devicetree, linux-gpio, lkml
Subsystem:
arm/stm32 architecture, the rest · Maintainers:
Maxime Coquelin, Alexandre Torgue, Linus Torvalds
Add DT nodes for the remaining SDMMC controllers 2 and 3. Signed-off-by: Marek Vasut <redacted> --- Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Bartosz Golaszewski <brgl@kernel.org> Cc: Conor Dooley <conor+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Linus Walleij <linusw@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com --- arch/arm64/boot/dts/st/stm32mp231.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/st/stm32mp231.dtsi
index a9de9fc5eb411..d70812f094142 100644
--- a/arch/arm64/boot/dts/st/stm32mp231.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi@@ -730,6 +730,36 @@ sdmmc1: mmc@48220000 { status = "disabled"; }; + sdmmc2: mmc@48230000 { + compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00353180>; + reg = <0x48230000 0x400>, <0x44230800 0x8>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc CK_KER_SDMMC2>; + clock-names = "apb_pclk"; + resets = <&rcc SDMMC2_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <166000000>; + access-controllers = <&rifsc 77>; + status = "disabled"; + }; + + sdmmc3: mmc@48240000 { + compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00353180>; + reg = <0x48240000 0x400>, <0x44230c00 0x8>; + interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc CK_KER_SDMMC3>; + clock-names = "apb_pclk"; + resets = <&rcc SDMMC3_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <166000000>; + access-controllers = <&rifsc 78>; + status = "disabled"; + }; + ethernet1: ethernet@482c0000 { compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20"; reg = <0x482c0000 0x4000>;
--
2.53.0