Re: [PATCH v3 0/6] can: flexcan: Add NXP S32N79 SoC support
From: Marc Kleine-Budde <mkl@pengutronix.de>
Date: 2026-03-24 13:46:37
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On 23.03.2026 14:58:21, Ciprian Costea wrote:
From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> This patch series adds FlexCAN support for the NXP S32N79 SoC. The S32N79 is an automotive-grade processor from NXP with multiple FlexCAN instances. The FlexCAN IP integration on S32N79 differs from other SoCs in the interrupt routing - it uses two separate interrupt lines: - one interrupt for mailboxes 0-127 - one interrupt for bus error detection and device state changes
Can you check if the S32N79 suffers from the | /* No interrupt for error passive */ | #define FLEXCAN_QUIRK_BROKEN_PERR_STATE BIT(6) problem? Maybe everyone just added the FLEXCAN_QUIRK_BROKEN_PERR_STATE for the new SoC without actually testing it. regards, Marc -- Pengutronix e.K. | Marc Kleine-Budde | Embedded Linux | https://www.pengutronix.de | Vertretung Nürnberg | Phone: +49-5121-206917-129 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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