Re: [PATCH v4 1/3] dt-bindings: dma: arm-dma350: document generic and combined IRQ topologies
From: Robin Murphy <robin.murphy@arm.com>
Date: 2026-03-24 12:04:52
Also in:
dmaengine, linux-devicetree, lkml
On 2026-03-23 11:48 am, Jun Guo wrote:
Update the DMA-350 DT binding to match the current driver behavior. Allow both: - "arm,dma-350" as the generic compatible, and - "cix,sky1-dma-350", "arm,dma-350" for SoC-specific fallback usage. Also document interrupt topology variants supported by hardware integration: - one combined interrupt for all channels, or - one interrupt per channel (up to 8 channels).
To repeat myself for the 3rd time, this is at best unnecessary, and at worst arguably wrong. Here's an example of a system which happens to use the combined interrupt from another IP block which also offers both options: https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/freescale/imx8qm.dtsi#n279 Same thing here; each channel is a distinct interrupt source, so it is perfectly honest to describe that consistently in DT, regardless of whether or not the interrupt signals are still distinct by the time they reach the interrupt controller. Furthermore, in this case the IRQ_COMB_NONSEC interrupt actually has additional functionality beyond just being a mux of the individual IRQ_CHANNEL interrupts. So although Linux probably won't ever care, if it's going to be in the DT binding then it should really be distinct from the channel interrupts anyway, since systems could well wire them *all* up, and an OS could choose to use the IRQ_CHANNEL outputs directly for individual channel completion/error status, while also using the IRQ_COMB_NONSEC just for its overall INTR_ALLCH{STOPPED,PAUSED,IDLE} status. If you only want to make your thing work in Linux, all that is needed is a 1-line change in the driver to enable the INTR_ANYCHINTR bit (which as I've also said before, we can do unconditionally because we're *not* using the other INTR_ALLCH stuff), and to write your DT using the existing binding. "One interrupt per channel" already carries no expectation that they all have to be *different* interrupts. Thanks, Robin.
quoted hunk ↗ jump to hunk
Assisted-by: Cursor: GPT-5.3-Codex Signed-off-by: Jun Guo <redacted> --- .../devicetree/bindings/dma/arm,dma-350.yaml | 34 +++++++++++++------ 1 file changed, 24 insertions(+), 10 deletions(-)diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml index 429f682f15d8..47091614d1b4 100644 --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml@@ -14,7 +14,14 @@ allOf: properties: compatible: - const: arm,dma-350 + description: + Use "arm,dma-350" for generic integration. A SoC-specific + compatible may be listed first, followed by "arm,dma-350". + oneOf: + - const: arm,dma-350 + - items: + - const: cix,sky1-dma-350 + - const: arm,dma-350 reg: items:@@ -22,15 +29,22 @@ properties: interrupts: minItems: 1 - items: - - description: Channel 0 interrupt - - description: Channel 1 interrupt - - description: Channel 2 interrupt - - description: Channel 3 interrupt - - description: Channel 4 interrupt - - description: Channel 5 interrupt - - description: Channel 6 interrupt - - description: Channel 7 interrupt + maxItems: 8 + description: + Either one interrupt per channel (8 interrupts), or one + combined interrupt for all channels. + oneOf: + - items: + - description: Channel 0 interrupt + - description: Channel 1 interrupt + - description: Channel 2 interrupt + - description: Channel 3 interrupt + - description: Channel 4 interrupt + - description: Channel 5 interrupt + - description: Channel 6 interrupt + - description: Channel 7 interrupt + - items: + - description: Combined interrupt shared by all channels "#dma-cells": const: 1