On Tue, 17 Feb 2026 13:16:19 +0100
Peter Zijlstra [off-list ref] wrote:

On Mon, Feb 16, 2026 at 05:43:24PM +0000, David Laight wrote:

quoted

On Mon, 16 Feb 2026 07:32:53 -0800
Linus Torvalds [off-list ref] wrote:
  

quoted

On Mon, 16 Feb 2026 at 03:09, David Laight [off-list ref] wrote:  

quoted

volatile structure members are almost free    

No, gcc does absolutely horrible things with volatiles. It disables a
lot of very basic stuff.

Try doing something as simple as a "var++" on a volatile, and cry.  

On x86 I just see a load, inc, store - not that surprising really.
(clang did do 'inc memory'.)

It's not as though 'inc memory' is atomic (without a lock prefix).

Also var++ will be 3 u-ops the same as the read, inc, write so the
underlying execution is much the same (ok you might save on the
address generation and the compiler doesn't have to find a register name,
but I don't remember anything modern being limited by instruction retirement).
You might save a bit of I-cache.  

Interrupts can tell the difference, and that matters.

Just makes it the same as every other architecture.

The only way to guarantee an 'add to memory' instruction is to use an
asm statement.

	David