Re: [PATCH v2 1/3] dt-bindings: usb: introduce fsl,imx-dwc3
From: Rob Herring <robh@kernel.org>
Date: 2026-02-04 13:46:25
Also in:
imx, linux-devicetree, linux-usb, lkml
On Wed, Feb 4, 2026 at 5:05 AM Xu Yang [off-list ref] wrote:
quoted hunk ↗ jump to hunk
The i.MX USB glue and DWC3 core are closely coupled. Describe the i.MX USB block in a single block will bring more benefits than a parent- child relation. The new binding is a copy of fsl,imx8mp-dwc3.yaml with the needed modifications. Add the common compatible string "fsl,imx-dwc3" to indicate that the flattened module should be selected. This compatible is also used by "select" to inform the DeviceTree validator to apply this binding. To avoid redefining all the platform-specific compatibles, "select" is used to tell the DeviceTree validator which binding to use solely on the generic compatible. Mark fsl,imx8mp-dwc3 deprecated, to favor expressing future platforms using the new combined binding. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> --- Changes in v2: - reorder compatible property --- .../devicetree/bindings/usb/fsl,imx-dwc3.yaml | 131 +++++++++++++++++++++ .../devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml | 13 ++ 2 files changed, 144 insertions(+)diff --git a/Documentation/devicetree/bindings/usb/fsl,imx-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx-dwc3.yaml new file mode 100644 index 0000000000000000000000000000000000000000..6932804516948bc0f8457553eee7e5ee704237f0 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/fsl,imx-dwc3.yaml@@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2026 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/fsl,imx-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX Soc USB Controller + +maintainers: + - Xu Yang <xu.yang_2@nxp.com> + +select: + properties: + compatible: + contains: + const: fsl,imx-dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - fsl,imx8mp-dwc3
You can't reuse the same compatible for a new binding.
+ - fsl,imx94-dwc3 + - fsl,imx95-dwc3 + - const: fsl,imx-dwc3
Drop. If you want a fallback, use the 1st SoC's compatible.
+
+ reg:
+ items:
+ - description: DWC3 core registers
+ - description: HSIO Block Control registers
+ - description: Wrapper registers of dwc3 core
+
+ reg-names:
+ items:
+ - const: core
+ - const: blkctl
+ - const: glue
+
+ interrupts:
+ items:
+ - description: DWC3 controller interrupt
+ - description: Wakeup interrupt from glue logic
+
+ interrupt-names:
+ items:
+ - const: dwc_usb3
+ - const: wakeup
+
+ iommus:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: System hsio root clock
+ - description: SoC Bus Clock for AHB/AXI/Native
+ - description: Reference clock for generating ITP when UTMI/ULPI PHY is suspended
+ - description: Suspend clock used for usb wakeup logic
+
+ clock-names:
+ items:
+ - const: hsio
+ - const: bus_early
+ - const: ref
+ - const: suspend
+
+ fsl,permanently-attached:
+ type: boolean
+ description:
+ Indicates if the device attached to a downstream port is
+ permanently attached
+
+ fsl,disable-port-power-control:
+ type: boolean
+ description:
+ Indicates whether the host controller implementation includes port
+ power control. Defines Bit 3 in capability register (HCCPARAMS)
+
+ fsl,over-current-active-low:
+ type: boolean
+ description:
+ Over current signal polarity is active low
+
+ fsl,power-active-low:
+ type: boolean
+ description:
+ Power pad (PWR) polarity is active low
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - power-domains
+
+allOf:
+ - $ref: snps,dwc3-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb@4c100000 {
+ compatible = "fsl,imx943-dwc3", "fsl,imx-dwc3";
+ reg = <0x4c100000 0x10000>,
+ <0x4c010010 0x04>,
+ <0x4c1f0000 0x20>;
+ reg-names = "core", "blkctl", "glue";
+ clocks = <&scmi_clk 74>, //IMX94_CLK_HSIO
+ <&scmi_clk 74>, //IMX94_CLK_HSIO
+ <&scmi_clk 2>, //IMX94_CLK_24M
+ <&scmi_clk 1>; //IMX94_CLK_32K
+ clock-names = "hsio", "bus_early", "ref", "suspend";
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3", "wakeup";
+ power-domains = <&scmi_devpd 13>; //IMX94_PD_HSIO_TOP
+ phys = <&usb3_phy>, <&usb3_phy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ snps,gfladj-refclk-lpm-sel-quirk;
+ snps,parkmode-disable-ss-quirk;
+ status = "disabled";Examples should be enabled.
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+ };diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml index 73e7a60a0060dee6417b9469251e121704b7a148..fd23c345149e0dba1ed3919a25195edf247cfc08 100644 --- a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml@@ -10,6 +10,19 @@ title: NXP iMX8MP Soc USB Controller maintainers: - Li Jun <jun.li@nxp.com> +deprecated: true + +select: + properties: + compatible: + oneOf: + - items: + - const: fsl,imx95-dwc3 + - const: fsl,imx8mp-dwc3 + - const: fsl,imx8mp-dwc3 + required: + - compatible + properties: compatible: oneOf: --2.34.1