Re: [PATCH v3 03/36] arm64/sysreg: Drop ICH_HFGRTR_EL2.ICC_HAPR_EL1 and make RES1
From: Jonathan Cameron <jonathan.cameron@huawei.com>
Date: 2026-01-12 14:03:53
Also in:
kvm, kvmarm
On Fri, 9 Jan 2026 17:04:39 +0000 Sascha Bischoff [off-list ref] wrote:
The GICv5 architecture is dropping the ICC_HAPR_EL1 and ICV_HAPR_EL1 system registers. These registers were never added to the sysregs, but the traps for them were. Drop the trap bit from the ICH_HFGRTR_EL2 and make it Res1 as per the upcoming GICv5 spec change. Additionally, update the EL2 setup code to not attempt to set that bit. Signed-off-by: Sascha Bischoff <redacted>
I'll take your word on it wrt to the spec change. For completeness. Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
quoted hunk ↗ jump to hunk
--- arch/arm64/include/asm/el2_setup.h | 1 - arch/arm64/tools/sysreg | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-)diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index cacd20df1786e..07c12f4a69b41 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h@@ -225,7 +225,6 @@ ICH_HFGRTR_EL2_ICC_ICSR_EL1 | \ ICH_HFGRTR_EL2_ICC_PCR_EL1 | \ ICH_HFGRTR_EL2_ICC_HPPIR_EL1 | \ - ICH_HFGRTR_EL2_ICC_HAPR_EL1 | \ ICH_HFGRTR_EL2_ICC_CR0_EL1 | \ ICH_HFGRTR_EL2_ICC_IDRn_EL1 | \ ICH_HFGRTR_EL2_ICC_APR_EL1)diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 8921b51866d64..dab5bfe8c9686 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg@@ -4579,7 +4579,7 @@ Field 7 ICC_IAFFIDR_EL1 Field 6 ICC_ICSR_EL1 Field 5 ICC_PCR_EL1 Field 4 ICC_HPPIR_EL1 -Field 3 ICC_HAPR_EL1 +Res1 3 Field 2 ICC_CR0_EL1 Field 1 ICC_IDRn_EL1 Field 0 ICC_APR_EL1