[PATCH v3 00/36] KVM: arm64: Introduce vGIC-v5 with PPI support
From: Sascha Bischoff <hidden>
Date: 2026-01-09 17:06:19
Also in:
kvm, kvmarm
This is the third version of the patch series to add the virtual GICv5 [1] device (vgic_v5). Only PPIs are supported by this initial series, and the vgic_v5 implementation is restricted to the CPU interface, only. Further patch series are to follow in due course, and will add support for SPIs, LPIs, the GICv5 IRS, and the GICv5 ITS. v1 and v2 of this series can be found at [2] & [3], respectively. Main changes since v2: * Reworked the PPI save/restore mechanisms to remove the _entry/_exit from the vcpu, and instead use per-cpu data structures (kvm_host_data). * PPI priorities are only synced back to KVM's shadow state on entering a WFI, rather than whenever checking for pending PPIs. * Optimised PPI state tracking to reduce the number of locks taken and PPIs iterated over using the masks of PPIs exposed to the guest. Where reasonable, masks, HMR are stored once per VM rather than per VCPU. * Reduced PPI trapping requirements - now only the ICC_PPI_ENABLERx_EL1 writes are trapped. * Fixed a case where the GICv3 VMCR clean up did cause a functional change (thanks for spotting that one, Jonathan!) * General code clean-ups, fixes. * Added Reviewed-by tags where appropriate. The following is still outstanding: * Allow for sparse PPI state storage (e.g., xarrays). Given that most of the 128 potential PPIs will never be used with a guest, it is extremely wasteful to allocate storage for them. These changes are based on v6.19-rc4. As before, the first commit has been cherry-picked from Marc's VTCR sanitisation series [4]. Thanks all for the feedback so far (Marc, Jonathan, Joey, & Lorenzo), and for any more you may have! Sascha [1] https://developer.arm.com/documentation/aes0070/latest [2] https://lore.kernel.org/all/20251212152215.675767-1-sascha.bischoff@arm.com/ (local) [3] https://lore.kernel.org/all/20251219155222.1383109-1-sascha.bischoff@arm.com/ (local) [4] https://lore.kernel.org/all/20251210173024.561160-1-maz@kernel.org/ (local) Marc Zyngier (1): KVM: arm64: Account for RES1 bits in DECLARE_FEAT_MAP() and co Sascha Bischoff (35): KVM: arm64: gic-v3: Switch vGIC-v3 to use generated ICH_VMCR_EL2 arm64/sysreg: Drop ICH_HFGRTR_EL2.ICC_HAPR_EL1 and make RES1 arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support arm64/sysreg: Add GICR CDNMIA encoding KVM: arm64: gic: Set vgic_model before initing private IRQs KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers KVM: arm64: gic: Introduce interrupt type helpers KVM: arm64: gic-v5: Add Arm copyright header KVM: arm64: gic-v5: Detect implemented PPIs on boot KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs KVM: arm64: gic-v5: Add emulation for ICC_IAFFIDR_EL1 accesses KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore KVM: arm64: gic-v5: Implement direct injection of PPIs KVM: arm64: gic-v5: Finalize GICv5 PPIs and generate mask KVM: arm64: gic: Introduce queue_irq_unlock and set_pending_state to irq_ops KVM: arm64: gic-v5: Implement PPI interrupt injection KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5 KVM: arm64: gic-v5: Check for pending PPIs KVM: arm64: gic-v5: Trap and mask guest ICC_PPI_ENABLERx_EL1 writes KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE KVM: arm64: gic-v5: Create, init vgic_v5 KVM: arm64: gic-v5: Reset vcpu state KVM: arm64: gic-v5: Bump arch timer for GICv5 KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 KVM: arm64: gic: Hide GICv5 for protected guests KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot irqchip/gic-v5: Check if impl is virt capable KVM: arm64: gic-v5: Probe for GICv5 device Documentation: KVM: Introduce documentation for VGICv5 KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest KVM: arm64: gic-v5: Communicate userspace-driveable PPIs via a UAPI Documentation/virt/kvm/api.rst | 6 +- .../virt/kvm/devices/arm-vgic-v5.rst | 50 ++ Documentation/virt/kvm/devices/index.rst | 1 + Documentation/virt/kvm/devices/vcpu.rst | 5 +- arch/arm64/include/asm/el2_setup.h | 3 +- arch/arm64/include/asm/kvm_asm.h | 4 + arch/arm64/include/asm/kvm_host.h | 35 ++ arch/arm64/include/asm/kvm_hyp.h | 9 + arch/arm64/include/asm/sysreg.h | 28 +- arch/arm64/include/asm/vncr_mapping.h | 3 + arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/arch_timer.c | 119 +++- arch/arm64/kvm/arm.c | 38 +- arch/arm64/kvm/config.c | 147 ++++- arch/arm64/kvm/emulate-nested.c | 123 +++- arch/arm64/kvm/hyp/include/hyp/switch.h | 27 + arch/arm64/kvm/hyp/nvhe/Makefile | 2 +- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 32 + arch/arm64/kvm/hyp/nvhe/switch.c | 15 + arch/arm64/kvm/hyp/nvhe/sys_regs.c | 8 + arch/arm64/kvm/hyp/vgic-v3-sr.c | 68 +-- arch/arm64/kvm/hyp/vgic-v5-sr.c | 120 ++++ arch/arm64/kvm/hyp/vhe/Makefile | 2 +- arch/arm64/kvm/nested.c | 5 + arch/arm64/kvm/pmu-emul.c | 20 +- arch/arm64/kvm/sys_regs.c | 95 ++- arch/arm64/kvm/vgic/vgic-init.c | 126 ++-- arch/arm64/kvm/vgic/vgic-kvm-device.c | 100 ++- arch/arm64/kvm/vgic/vgic-mmio.c | 28 +- arch/arm64/kvm/vgic/vgic-v3-nested.c | 8 +- arch/arm64/kvm/vgic/vgic-v3.c | 48 +- arch/arm64/kvm/vgic/vgic-v5.c | 570 +++++++++++++++++- arch/arm64/kvm/vgic/vgic.c | 109 +++- arch/arm64/kvm/vgic/vgic.h | 48 +- arch/arm64/tools/sysreg | 482 ++++++++++++++- drivers/irqchip/irq-gic-v5-irs.c | 4 + drivers/irqchip/irq-gic-v5.c | 10 + include/kvm/arm_arch_timer.h | 11 +- include/kvm/arm_pmu.h | 5 +- include/kvm/arm_vgic.h | 151 ++++- include/linux/irqchip/arm-gic-v5.h | 39 ++ include/linux/kvm_host.h | 1 + include/uapi/linux/kvm.h | 2 + tools/arch/arm64/include/uapi/asm/kvm.h | 1 + tools/include/uapi/linux/kvm.h | 2 + tools/testing/selftests/kvm/Makefile.kvm | 1 + tools/testing/selftests/kvm/arm64/vgic_v5.c | 220 +++++++ .../selftests/kvm/include/arm64/gic_v5.h | 148 +++++ 48 files changed, 2797 insertions(+), 283 deletions(-) create mode 100644 Documentation/virt/kvm/devices/arm-vgic-v5.rst create mode 100644 arch/arm64/kvm/hyp/vgic-v5-sr.c create mode 100644 tools/testing/selftests/kvm/arm64/vgic_v5.c create mode 100644 tools/testing/selftests/kvm/include/arm64/gic_v5.h -- 2.34.1