Re: [PATCH 1/3] dmaengine: xilinx_dma: Fix channel idle state management in interrupt handler
From: Folker Schwesinger <hidden>
Date: 2025-09-18 07:46:47
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dmaengine, lkml
On Wed Sep 17, 2025 at 3:36 PM CEST, Suraj Gupta wrote:
Only mark the channel as idle and start new transfers when the active list
is actually empty, ensuring proper channel state management and avoiding
spurious transfer attempts.
Signed-off-by: Suraj Gupta <redacted>
Fixes: c0bba3a99f07 ("dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access Engine")Tested-by: Folker Schwesinger <redacted>
quoted hunk ↗ jump to hunk
--- drivers/dma/xilinx/xilinx_dma.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index a34d8f0ceed8..9f416eae33d0 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c@@ -1914,8 +1914,10 @@ static irqreturn_t xilinx_dma_irq_handler(int irq, void *data) XILINX_DMA_DMASR_DLY_CNT_IRQ)) { spin_lock(&chan->lock); xilinx_dma_complete_descriptor(chan); - chan->idle = true; - chan->start_transfer(chan); + if (list_empty(&chan->active_list)) { + chan->idle = true; + chan->start_transfer(chan); + } spin_unlock(&chan->lock); }