Thread (12 messages) 12 messages, 3 authors, 2025-08-12

Re: [PATCH 1/5] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8ULP compatible string

From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2025-08-12 08:34:42
Also in: imx, linux-devicetree, linux-media, lkml

On 12/08/2025 10:19, guoniu.zhou@oss.nxp.com wrote:
quoted hunk ↗ jump to hunk
From: Guoniu Zhou <redacted>

The CSI-2 receiver in the i.MX8ULP is almost identical to the
version present in the i.MX8QXP/QM. But have different reset
and clock design, so add a device-specific compatible string
for i.MX8ULP to handle the difference.

Signed-off-by: Guoniu Zhou <redacted>
---
 .../bindings/media/nxp,imx8mq-mipi-csi2.yaml  | 23 +++++++++++++++++++
 1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
index 3389bab266a9..83fdda2252e5 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
@@ -20,6 +20,7 @@ properties:
       - enum:
           - fsl,imx8mq-mipi-csi2
           - fsl,imx8qxp-mipi-csi2
+          - fsl,imx8ulp-mipi-csi2
       - items:
           - const: fsl,imx8qm-mipi-csi2
           - const: fsl,imx8qxp-mipi-csi2
@@ -39,12 +40,17 @@ properties:
                      clock that the RX DPHY receives.
       - description: ui is the pixel clock (phy_ref up to 333Mhz).
                      See the reference manual for details.
+      - description: pclk is the lpav bus clock of i.MX8ULP.
+                     See the reference manual for details.
+    minItems: 3
You need to restrict all variants. Or explain why old hardware has now 4
clocks. That explanation is missing.

Best regards,
Krzysztof
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