Re: [PATCH v2 08/10] arm64: dts: imx943: Add display pipeline nodes
From: Frank Li <Frank.li@nxp.com>
Date: 2025-07-16 19:02:10
Also in:
dri-devel, imx, linux-devicetree, lkml
On Wed, Jul 16, 2025 at 11:15:12AM +0300, Laurentiu Palcu wrote:
quoted hunk ↗ jump to hunk
Add display controller and LDB support in imx943. Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com> --- arch/arm64/boot/dts/freescale/imx943.dtsi | 56 ++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi index 657c81b6016f2..db00a94812e18 100644 --- a/arch/arm64/boot/dts/freescale/imx943.dtsi +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi@@ -148,7 +148,7 @@ l3_cache: l3-cache { }; }; - clock-ldb-pll-div7 { + clock_ldb_pll_div7: clock-ldb-pll-div7 { compatible = "fixed-factor-clock"; #clock-cells = <0>; clocks = <&scmi_clk IMX94_CLK_LDBPLL>;@@ -173,10 +173,64 @@ dispmix_csr: syscon@4b010000 { lvds_csr: syscon@4b0c0000 { compatible = "nxp,imx94-lvds-csr", "syscon";
Did you update nxp,imx94-lvds-csr's binding doc to allow add child node ldb@4 ?
+ #address-cells = <1>; + #size-cells = <1>; reg = <0x0 0x4b0c0000 0x0 0x10000>;
reg should be second property. add address-cells after reg
clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
#clock-cells = <1>;
power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+
+ ldb: ldb@4 {
+ compatible = "fsl,imx94-ldb";
+ #address-cells = <1>;
+ #size-cells = <0>;the same here. Frank
+ reg = <0x4 0x4>, <0x8 0x4>;
+ reg-names = "ldb", "lvds";
+ clocks = <&lvds_csr IMX94_CLK_DISPMIX_LVDS_CLK_GATE>;
+ clock-names = "ldb";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lvds_in: endpoint {
+ remote-endpoint = <&dcif_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+ };
+
+ dcif: display-controller@4b120000 {
+ compatible = "nxp,imx94-dcif";
+ reg = <0x0 0x4b120000 0x0 0x300000>;
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common", "bg_layer", "fg_layer";
+ clocks = <&scmi_clk IMX94_CLK_DISPAPB>,
+ <&scmi_clk IMX94_CLK_DISPAXI>,
+ <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
+ clock-names = "apb", "axi", "pix";
+ assigned-clocks = <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
+ assigned-clock-parents = <&clock_ldb_pll_div7>;
+ power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+ nxp,blk-ctrl = <&dispmix_csr>;
+ status = "disabled";
+
+ port {
+ dcif_out: endpoint {
+ remote-endpoint = <&lvds_in>;
+ };
+ };
};
};
};
--
2.34.1