Re: [PATCH v7 01/12] dt-bindings: mfd: add support for the NXP SIUL2 module
From: Krzysztof Kozlowski <krzk@kernel.org>
Date: 2025-07-11 07:40:01
Also in:
imx, linux-devicetree, linux-gpio, lkml
On Thu, Jul 10, 2025 at 05:20:24PM +0300, Andrei Stefanescu wrote:
quoted hunk ↗ jump to hunk
Add the dt-bindings for the NXP SIUL2 module which is a multi function device. It can export information about the SoC, configure the pinmux&pinconf for pins and it is also a GPIO controller with interrupt capability. Signed-off-by: Andrei Stefanescu <redacted> --- .../bindings/mfd/nxp,s32g2-siul2.yaml | 163 ++++++++++++++++++ 1 file changed, 163 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yamldiff --git a/Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml b/Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml new file mode 100644 index 000000000000..8ae185b4bc78 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml@@ -0,0 +1,163 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/nxp,s32g2-siul2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32 System Integration Unit Lite2 (SIUL2) + +maintainers: + - Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> + +description: | + SIUL2 is a hardware block which implements pinmuxing, + pinconf, GPIOs (some with interrupt capability) and + registers which contain information about the SoC. + There are generally two SIUL2 modules whose functionality + is grouped together. For example interrupt configuration + registers are part of SIUL2_1 even though interrupts are + also available for SIUL2_0 pins. + + The following register types are exported by SIUL2: + - MIDR (MCU ID Register) - information related to the SoC + - interrupt configuration registers + - MSCR (Multiplexed Signal Configuration Register) - pinmuxing and pinconf + - IMCR (Input Multiplexed Signal Configuration Register)- pinmuxing + - PGPDO (Parallel GPIO Pad Data Out Register) - GPIO output value + - PGPDI (Parallel GPIO Pad Data In Register) - GPIO input value + + Most registers are 32bit wide with the exception of PGPDO/PGPDI which are + 16bit wide. + +properties: + compatible: + oneOf: + - const: nxp,s32g2-siul2 + - items: + - enum: + - nxp,s32g3-siul2 + - const: nxp,s32g2-siul2 + + reg: + minItems: 2
Eh, and after reading your deprecated patch I went back here and see this changed... Why? Why are you making random changes? I retract my review, I was too hasty. Best regards, Krzysztof