Thread (16 messages) 16 messages, 3 authors, 2025-03-26

Re: [PATCH] PCI: j721e: Fix the value of linkdown_irq_regfield for J784S4

From: Krzysztof Wilczyński <hidden>
Date: 2025-03-11 15:00:03
Also in: linux-omap, linux-pci, lkml, stable

Hello,
Commit under Fixes assigned the value of 'linkdown_irq_regfield' for the
J784S4 SoC as 'LINK_DOWN' which corresponds to BIT(1). However, according
to the Technical Reference Manual and Register Documentation for the J784S4
SoC [0], BIT(1) corresponds to "ENABLE_SYS_EN_PCIE_DPA_1" which is __NOT__
the field for the link-state interrupt. Instead, it is BIT(10) of the
"PCIE_INTD_ENABLE_REG_SYS_2" register that corresponds to the link-state
field named as "ENABLE_SYS_EN_PCIE_LINK_STATE".

Hence, set 'linkdown_irq_regfield' to the macro 'J7200_LINK_DOWN' which
expands to BIT(10) and was first defined for the J7200 SoC. Other SoCs
already reuse this macro since it accurately represents the link-state
field in their respective "PCIE_INTD_ENABLE_REG_SYS_2" register.

[0]: https://www.ti.com/lit/zip/spruj52
Applied to controller/j721e, thank you!

	Krzysztof
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