Re: [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
From: Rob Herring <robh@kernel.org>
Date: 2025-03-07 12:15:45
Also in:
linux-devicetree, lkml
On Tue, Feb 18, 2025 at 12:55 PM Vaishnav Achath [off-list ref] wrote:
quoted hunk ↗ jump to hunk
TechNexion TEVI OV5640 camera is a 5MP camera that can be used with J722S EVM through the 22-pin CSI-RX connector. Add a reference overlay for quad TEVI OV5640 modules on J722S EVM. Signed-off-by: Vaishnav Achath <redacted> --- arch/arm64/boot/dts/ti/Makefile | 4 + .../k3-j722s-evm-csi2-quad-tevi-ov5640.dtso | 319 ++++++++++++++++++ 2 files changed, 323 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtsodiff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 9ae0917e5763..0370392abda8 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile@@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb@@ -212,6 +213,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \ k3-j721s2-evm-pcie1-ep.dtbo k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \ k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo +k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \ + k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \ k3-j784s4-evm-pcie0-pcie1-ep.dtbo k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \@@ -247,6 +250,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-j721e-sk-csi2-dual-imx219.dtb \ k3-j721s2-evm-pcie1-ep.dtb \ k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \ + k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \ k3-j784s4-evm-pcie0-pcie1-ep.dtb \ k3-j784s4-evm-quad-port-eth-exp1.dtb \ k3-j784s4-evm-usxgmii-exp1-exp2.dtbdiff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso new file mode 100644 index 000000000000..f33f50465a07 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso@@ -0,0 +1,319 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * 4 x TEVI OV5640 MIPI Camera module on RPI camera connector. + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> +#include "k3-pinctrl.h" + +&{/} { + clk_ov5640_fixed: ov5640-xclk {
clock-24000000 for the node name.
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+};
+
+
+&main_pmx0 {
+ cam0_reset_pins_default: cam0-reset-pins-default {Doesn't match the schema. Please test your changes: pinctrl@f4000: 'cam0-reset-pins-default', 'cam1-reset-pins-default', 'cam2-reset-pins-default', 'cam3-reset-pins-default' do not match any of the regexes: '-pins(-[0-9]+)?$|-pin$', 'pinctrl-[0-9]+'
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x03c, PIN_OUTPUT, 7)
+ >;
+ };
+
+ cam1_reset_pins_default: cam1-reset-pins-default {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x044, PIN_OUTPUT, 7)
+ >;
+ };
+
+ cam2_reset_pins_default: cam2-reset-pins-default {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x04c, PIN_OUTPUT, 7)
+ >;
+ };
+
+ cam3_reset_pins_default: cam3-reset-pins-default {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x054, PIN_OUTPUT, 7)
+ >;
+ };
+};
+
+&exp1 {
+ p06-hog{
+ /* P06 - CSI01_MUX_SEL_2 */
+ gpio-hog;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI01_MUX_SEL_2";
+ };
+
+ p07-hog{
+ /* P01 - CSI23_MUX_SEL_2 */
+ gpio-hog;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI23_MUX_SEL_2";
+ };
+};
+
+&main_gpio0 {
+ p15-hog {
+ /* P15 - CSI2_CAMERA_GPIO1 */
+ gpio-hog;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI2_CAMERA_GPIO1";
+ };
+
+ p17-hog {
+ /* P17 - CSI2_CAMERA_GPIO2 */
+ gpio-hog;
+ gpios = <17 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI2_CAMERA_GPIO2";
+ };
+
+ p19-hog {
+ /* P19 - CSI2_CAMERA_GPIO3 */
+ gpio-hog;
+ gpios = <19 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI2_CAMERA_GPIO3";
+ };
+
+ p21-hog {
+ /* P21 - CSI2_CAMERA_GPIO4 */
+ gpio-hog;
+ gpios = <21 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CSI2_CAMERA_GPIO4";
+ };
+};
+
+&pca9543_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-alias-pool = /bits/ 16 <0x3c 0x3d>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ ov5640_0: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&clk_ov5640_fixed>;
+ clock-names = "xclk";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_reset_pins_default>;
+
+ port {
+ csi2_cam0: endpoint {
+ remote-endpoint = <&csi2rx0_in_sensor>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ ov5640_1: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&clk_ov5640_fixed>;
+ clock-names = "xclk";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam1_reset_pins_default>;
+
+ port {
+ csi2_cam1: endpoint {
+ remote-endpoint = <&csi2rx1_in_sensor>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+ };
+};
+
+&pca9543_1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-alias-pool = /bits/ 16 <0x3c 0x3d>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ ov5640_2: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&clk_ov5640_fixed>;
+ clock-names = "xclk";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam2_reset_pins_default>;
+
+ port {
+ csi2_cam2: endpoint {
+ remote-endpoint = <&csi2rx2_in_sensor>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ ov5640_3: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&clk_ov5640_fixed>;
+ clock-names = "xclk";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam3_reset_pins_default>;
+
+ port {
+ csi2_cam3: endpoint {
+ remote-endpoint = <&csi2rx3_in_sensor>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+ };
+};
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx0_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam0>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx1_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam1>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx2 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi2_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx2_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam2>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&cdns_csi2rx3 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi3_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx3_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam3>;
+ bus-type = <4>; /* CSI2 DPHY */
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
+
+&dphy1 {
+ status = "okay";
+};
+
+
+&ti_csi2rx2 {
+ status = "okay";
+};
+
+&dphy2 {
+ status = "okay";
+};
+
+
+&ti_csi2rx3 {
+ status = "okay";
+};
+
+&dphy3 {
+ status = "okay";
+};
--
2.34.1