Thread (9 messages) 9 messages, 4 authors, 2025-02-20

Re: [PATCH] arm: clk: Add ETH switch clock description for vf610 SoC

From: Andrew Lunn <andrew@lunn.ch>
Date: 2025-02-20 15:23:28
Also in: imx, linux-clk, linux-devicetree, lkml

quoted
Seems like a reasonable compromise. You would only load this driver if
you intend to make use of the switch...
Yes, the main use case would be the switch (after bridge ... command
called).

However, until then we shall? have port separation.
Yes. The model Linux uses is that the ports are individual interfaces
to start with. We should keep to that model.
quoted
MoreThanIP is now part of Synopsys. I wounder if this IP now exists in
other SoCs? The press release however suggests Synopsys was
interesting in the high speed interfaces, not a two ports Fast
Ethernet switch.
I would need some detailed documentation....
Which is probably not available. You might be able to get some clues
from the Freescale datasheets, if they have kept the address spaces
separated. I don't see it as a strong requirement, given how old this
IP is, and the limited interest in supporting it over the years, My
guess is, nobody else uses it.

	Andrew
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