[PATCH 2/9] arm64: dts: apple: t7000: Add CPU caches
From: Nick Chan <hidden>
Date: 2025-02-20 12:22:32
Also in:
asahi, linux-devicetree, lkml
Subsystem:
arm/apple machine support, the rest · Maintainers:
Sven Peter, Janne Grunau, Linus Torvalds
Add information about CPU caches in Apple A8 SoC. Signed-off-by: Nick Chan <redacted> --- arch/arm64/boot/dts/apple/t7000.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi
index 32cac8c30e62d657079dbf32aece8af0fd9cef38..229ebd78c9d14609c30cdd011d1ec59847c846f8 100644
--- a/arch/arm64/boot/dts/apple/t7000.dtsi
+++ b/arch/arm64/boot/dts/apple/t7000.dtsi@@ -37,6 +37,9 @@ cpu0: cpu@0 { operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; + next-level-cache = <&l2_cache>; + i-cache-size = <0x10000>; + d-cache-size = <0x10000>; }; cpu1: cpu@1 {
@@ -47,6 +50,16 @@ cpu1: cpu@1 { operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; + next-level-cache = <&l2_cache>; + i-cache-size = <0x10000>; + d-cache-size = <0x10000>; + }; + + l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x100000>; }; };
--
2.48.1