Re: [PATCH 3/3] arm64: dts: rockchip: add dts for Ariaboard Photonicat RK3568
From: Andrew Lunn <andrew@lunn.ch>
Date: 2024-09-05 18:20:27
Also in:
linux-devicetree, linux-rockchip, lkml
From: Andrew Lunn <andrew@lunn.ch>
Date: 2024-09-05 18:20:27
Also in:
linux-devicetree, linux-rockchip, lkml
arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts also
uses YT8521. I added rx-internal-delay-ps and tx-internal-delay-ps
to rgmii_phy1 of mdio1 according to the prompts, and it now works
well using rgmii-id!
&mdio1 {
rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
rx-internal-delay-ps = <1500>;
tx-internal-delay-ps = <1500>;
};
};
&gmac1 {
[...]
phy-mode = "rgmii-id";
[...]
tx_delay = <0x0>;
rx_delay = <0x0>;
status = "okay";
/* Motorcomm YT8521SC WAN port */
};That looks O.K. The YT8521SC seems to have issues with delays. jh7100-starfive-visionfive-v1.dts says /* * The board uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires * manual adjustment of the RX internal delay to work properly. The default * RX delay provided by the driver (1.95ns) is too high, but applying a 50% * reduction seems to mitigate the issue. * * It is worth noting the adjustment is not necessary on BeagleV Starlight SBC, * which uses a Microchip PHY. Hence, most likely the Motorcomm PHY is the one * responsible for the misbehaviour, not the GMAC. */ Andrew