Re: [PATCH v6 4/4] clk: samsung: add top clock support for ExynosAuto v920 SoC

On Tue, 2024-08-20 at 10:50 +0900, sunyeal.hong wrote:

Hello Kwanghoon,

quoted

-----Original Message-----
From: Kwanghoon Son <redacted>
Sent: Monday, August 19, 2024 6:32 PM
To: Sunyeal Hong <redacted>; Krzysztof Kozlowski
[off-list ref]; Sylwester Nawrocki [off-list ref]; Chanwoo
Choi [off-list ref]; Alim Akhtar [off-list ref];
Michael Turquette [off-list ref]; Stephen Boyd
[off-list ref]; Rob Herring [off-list ref]; Conor Dooley
[off-list ref]
Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org;
devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
kernel@vger.kernel.org
Subject: Re: [PATCH v6 4/4] clk: samsung: add top clock support for
ExynosAuto v920 SoC

On Mon, 2024-08-19 at 14:24 +0900, Sunyeal Hong wrote:

quoted

This adds support for CMU_TOP which generates clocks for all the
function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
and they will generate bus clocks.

Signed-off-by: Sunyeal Hong <redacted>
---
 drivers/clk/samsung/Makefile             |    1 +
 drivers/clk/samsung/clk-exynosautov920.c | 1173
++++++++++++++++++++++
 2 files changed, 1174 insertions(+)
 create mode 100644 drivers/clk/samsung/clk-exynosautov920.c

diff --git a/drivers/clk/samsung/Makefile

b/drivers/clk/samsung/Makefile index 3056944a5a54..f1ba48758c78 100644

--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile

@@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-

exynos7.o

quoted

 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos7885.o
 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynos850.o
 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynosautov9.o
+obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-exynosautov920.o
 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK)	+= clk-gs101.o
 obj-$(CONFIG_S3C64XX_COMMON_CLK)	+= clk-s3c64xx.o
 obj-$(CONFIG_S5PV210_COMMON_CLK)	+= clk-s5pv210.o clk-s5pv210-

audss.o

quoted

diff --git a/drivers/clk/samsung/clk-exynosautov920.c

b/drivers/clk/samsung/clk-exynosautov920.c
new file mode 100644
index 000000000000..c17d25e3c9a0

--- /dev/null
+++ b/drivers/clk/samsung/clk-exynosautov920.c

[snip]

quoted

+};
+
+static const struct samsung_cmu_info peric0_cmu_info __initconst = {
+	.mux_clks		= peric0_mux_clks,
+	.nr_mux_clks		= ARRAY_SIZE(peric0_mux_clks),
+	.div_clks		= peric0_div_clks,
+	.nr_div_clks		= ARRAY_SIZE(peric0_div_clks),
+	.nr_clk_ids		= CLKS_NR_PERIC0,
+	.clk_regs		= peric0_clk_regs,
+	.nr_clk_regs		= ARRAY_SIZE(peric0_clk_regs),
+	.clk_name		= "dout_clkcmu_peric0_noc",

same question.
Isn't it "noc"?
https://lore.kernel.org/linux-samsung-
soc/58dfae564a4a624e464c7803a309f1f07b5ae83d.camel@samsung.com/

In my case(autov9), if put wrong clk_name dmesg will show that,
exynos_arm64_register_cmu: could not enable bus clock ...; err = -2

Kwang.

clk_name follows the guide document provided by hw. v9 is bus, but v920 uses noc.

What I mean,

.clk_name		= "dout_clkcmu_peric0_noc", // wrong
.clk_name		= "noc", // correct

Because there is no clock-names "dout_clkcmu_peric0_noc" in
exynos/exynosautov920.dtsi.

But if you tested your patch and working fine, ignore my comment.

Kwang.

Best Regards,
sunyeal