On Thu, Jul 25, 2024 at 12:48 AM Manivannan Sadhasivam
[off-list ref] wrote:

On Tue, Jul 16, 2024 at 05:31:23PM -0400, Jim Quinlan wrote:

quoted

We've been assuming that if an SOC has a "rescal" reset controller that we
should automatically invoke brcm_phy_cntl(...).  This will not be true in
future SOCs, so we create a bool "has_phy" and adjust the cfg_data
appropriately (we need to give 7216 its own cfg_data structure instead of
sharing one).

In all commit messages, use imperative tone as per kernel documentation:

"Describe your changes in imperative mood, e.g. "make xyzzy do frotz"
instead of "[This patch] makes xyzzy do frotz" or "[I] changed xyzzy
to do frotz", as if you are giving orders to the codebase to change
its behaviour."

ack

quoted

Signed-off-by: Jim Quinlan <redacted>
Reviewed-by: Stanimir Varbanov <redacted>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index dfb404748ad8..8ab5a8ca05b4 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c

@@ -222,6 +222,7 @@ enum pcie_type {
 struct pcie_cfg_data {
      const int *offsets;
      const enum pcie_type type;
+     const bool has_phy;

'has_phy' means the controller supports PHY and the new SoC doesn't have a PHY
for the controller?

Well they all have a phy but in this case parts of it are exposed to
SW.  Perhaps "has_phy_cntl" would suffice?

Regards,
Jim Quinlan
Broadcom STB/CM

- Mani

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