Thread (36 messages) 36 messages, 7 authors, 2024-07-16

Re: [PATCH v3 09/12] PCI: brcmstb: Refactor for chips with many regular inbound BARs

From: Stanimir Varbanov <hidden>
Date: 2024-07-15 10:39:03
Also in: linux-pci, lkml


On 7/11/24 01:16, Jim Quinlan wrote:
Previously, our chips provided three inbound "BARS" with fixed purposes:
the first was for mapping SoC internal registers, the second was for
memory, and the third was for memory but with the endian swapped.  We
typically only used one of these BARs.

Complicating that BARs usage was the fact that the PCIe HW would do a
baroque internal mapping of system memory, and concatenate the regions of
multiple memory controllers.

Newer chips such as the 7712 and Cable Modem SOCs have taken a step forward
and now provide multiple inbound BARs.  This works in concert with the
dma-ranges property, where each provided range becomes an inbound BAR.

This commit provides support for these new chips and their multiple
inbound BARs but also keeps the legacy support for the older system.

Signed-off-by: Jim Quinlan <redacted>
---
 drivers/pci/controller/pcie-brcmstb.c | 216 ++++++++++++++++++++------
 1 file changed, 167 insertions(+), 49 deletions(-)
Reviewed-by: Stanimir Varbanov <redacted>

~Stan
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