Hi Krzysztof,

On Thu, 2024-02-01 at 11:02 +0100, Krzysztof Kozlowski wrote:

On 30/01/2024 10:36, André Draszik wrote:

quoted

The peric0_top1_ipclk_0 and peric0_top1_pclk_0 are the clocks going to
peric0/uart_usi, with pclk being the bus clock. Without pclk running,
any bus access will hang.
Unfortunately, in commit d97b6c902a40 ("arm64: dts: exynos: gs101:
update USI UART to use peric0 clocks") the gs101 DT ended up specifying
an incorrect pclk in the respective node and instead the two clocks
here were marked as critical.

We have fixed the gs101 DT and can therefore drop this incorrect
work-around here, the uart driver will claim these clocks as needed.

How did you fixed the DTS? Which commit did it? Are we going back to
basics of driver changes depending on DTS?

Sorry if the description isn't clear.

a) these clocks are not critical for the system to work, and this patch fixes that.
b) the initial DTSI for gs101 used incorrect clocks for the serial, and it didn't
work. The work-around was to specify these clocks here as critical instead. Patch
#4 in this series has corrected the DTSI.

So there is no dependency between the DTS update and the driver update here as such,
no new properties, or otherwise.

That said, now that b) above has been fixed (in patch #4), it is OK to mark these
clocks as non-critical without any ill effects. That's all that is happening. I was
merely referencing that in the commit message.

I can rephrase things if you wish.


Cheers,
Andre'


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