On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
quoted hunk ↗ jump to hunk
From: Ghennadi Procopciuc <redacted>
Add the SCMI clock IDs for the uSDHC controller present on
S32G SoCs.
Signed-off-by: Ciprian Costea <redacted>
Signed-off-by: Ghennadi Procopciuc <redacted>
---
include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
new file mode 100644
index 000000000000..739f98a924c3
--- /dev/null
+++ b/include/dt-bindings/clock/s32g-scmi-clock.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
+/*
+ * Copyright 2020-2024 NXP
+ */
+#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
+#define _DT_BINDINGS_SCMI_CLK_S32G_H
+
+/* uSDHC */
+#define S32G_SCMI_CLK_USDHC_AHB 31
+#define S32G_SCMI_CLK_USDHC_MODULE 32
+#define S32G_SCMI_CLK_USDHC_CORE 33
+#define S32G_SCMI_CLK_USDHC_MOD32K 34
Why do these numbers not start at 0?