[PATCH v8 17/26] PM / devfreq: rockchip-dfi: make register stride SoC specific
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: 2023-10-18 06:17:57
Also in:
linux-devicetree, linux-pm, linux-rockchip, lkml
Subsystem:
arm/rockchip soc support, device frequency (devfreq), device frequency event (devfreq-event), the rest · Maintainers:
Heiko Stuebner, MyungJoo Ham, Kyungmin Park, Chanwoo Choi, Linus Torvalds
The currently supported RK3399 has a stride of 20 between the channel
specific registers. Upcoming RK3588 has a different stride, so put
the stride into driver data to make it configurable.
While at it convert decimal 20 to hex 0x14 for consistency with RK3588
which has a register stride 0x4000 and we want to write that in hex
as well.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sebastian Reichel <redacted>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
Notes:
Changes since v7:
- Initialize ddrmon_stride for RK3568 and explain why it's not needed
drivers/devfreq/event/rockchip-dfi.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 63977f9fc2693..a3d823ac68ace 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c@@ -113,6 +113,7 @@ struct rockchip_dfi { int active_events; int burst_len; int buswidth[DMC_MAX_CHANNELS]; + int ddrmon_stride; }; static int rockchip_dfi_enable(struct rockchip_dfi *dfi)
@@ -190,13 +191,13 @@ static void rockchip_dfi_read_counters(struct rockchip_dfi *dfi, struct dmc_coun if (!(dfi->channel_mask & BIT(i))) continue; res->c[i].read_access = readl_relaxed(dfi_regs + - DDRMON_CH0_RD_NUM + i * 20); + DDRMON_CH0_RD_NUM + i * dfi->ddrmon_stride); res->c[i].write_access = readl_relaxed(dfi_regs + - DDRMON_CH0_WR_NUM + i * 20); + DDRMON_CH0_WR_NUM + i * dfi->ddrmon_stride); res->c[i].access = readl_relaxed(dfi_regs + - DDRMON_CH0_DFI_ACCESS_NUM + i * 20); + DDRMON_CH0_DFI_ACCESS_NUM + i * dfi->ddrmon_stride); res->c[i].clock_cycles = readl_relaxed(dfi_regs + - DDRMON_CH0_COUNT_NUM + i * 20); + DDRMON_CH0_COUNT_NUM + i * dfi->ddrmon_stride); } }
@@ -664,6 +665,8 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) dfi->buswidth[0] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH0, val) == 0 ? 4 : 2; dfi->buswidth[1] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH1, val) == 0 ? 4 : 2; + dfi->ddrmon_stride = 0x14; + return 0; };
@@ -690,6 +693,8 @@ static int rk3568_dfi_init(struct rockchip_dfi *dfi) dfi->buswidth[0] = FIELD_GET(RK3568_PMUGRF_OS_REG2_BW_CH0, reg2) == 0 ? 4 : 2; + dfi->ddrmon_stride = 0x0; /* not relevant, we only have a single channel on this SoC */ + return 0; };
--
2.39.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel