Re: [PATCH v2 13/28] clk: renesas: add minimal boot support for RZ/G3S SoC
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2023-10-04 12:42:13
Also in:
linux-clk, linux-devicetree, linux-gpio, linux-renesas-soc, linux-serial, lkml
On Fri, Sep 29, 2023 at 7:39 AM Claudiu [off-list ref] wrote:
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Add minimal clock and reset support for RZ/G3S SoC to be able to boot
Linux from SD Card/eMMC. This includes necessary core clocks for booting
and GIC, SCIF, GPIO, SD0 mod clocks and resets.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
Changes in v2:
- used RZ/G3S specific definition for CPG_CLKDIVSTATUS register
- removed CLK_PLL3_DIV2_2, CLK_SD0_DIV, CLK_S0_DIV2
- added space after { and before } in array initializations
- s/indexes/indices/g
- s/.osc/OSC and moved it in core output clocks section
- s/.osc2/OSC2 and moved it in core output clock section
- s/SD0_DIV4/.sd0_div4
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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