Re: [PATCH v7 06/12] arm64: tlb: Refactor the core flush algorithm of __flush_tlb_range
From: Marc Zyngier <maz@kernel.org>
Date: 2023-08-02 15:58:39
Also in:
kvm, kvm-riscv, kvmarm, linux-mips, linux-riscv, lkml
On Mon, 31 Jul 2023 18:36:47 +0100, Raghavendra Rao Ananta [off-list ref] wrote:
On Thu, Jul 27, 2023 at 3:58 AM Marc Zyngier [off-list ref] wrote:quoted
On Sat, 22 Jul 2023 03:22:45 +0100, Raghavendra Rao Ananta [off-list ref] wrote:quoted
Currently, the core TLB flush functionality of __flush_tlb_range() hardcodes vae1is (and variants) for the flush operation. In the upcoming patches, the KVM code reuses this core algorithm with ipas2e1is for range based TLB invalidations based on the IPA. Hence, extract the core flush functionality of __flush_tlb_range() into its own macro that accepts an 'op' argument to pass any TLBI operation, such that other callers (KVM) can benefit. No functional changes intended. Signed-off-by: Raghavendra Rao Ananta <redacted> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Gavin Shan <redacted> Reviewed-by: Shaoqin Huang <redacted> --- arch/arm64/include/asm/tlbflush.h | 109 +++++++++++++++--------------- 1 file changed, 56 insertions(+), 53 deletions(-)diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 412a3b9a3c25..f7fafba25add 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h@@ -278,14 +278,62 @@ static inline void flush_tlb_page(struct vm_area_struct *vma, */ #define MAX_TLBI_OPS PTRS_PER_PTE +/* When the CPU does not support TLB range operations, flush the TLB + * entries one by one at the granularity of 'stride'. If the TLB + * range ops are supported, then:Comment format (the original was correct).Isn't the format the same as original? Or are you referring to the fact that it needs to be placed inside the macro definition?
No, I'm referring to the multiline comment that starts with: /* When the CPU does not support TLB range operations... instead of the required: /* * When the CPU does not support TLB range operations which was correct before the coment was moved. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel